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PI74FCT162Q244T Datasheet

  • PI74FCT162Q244T

  • Fast, Low Noise CMOS 16-Bit Buffer/Line Driver

  • 6頁

  • PERICOM   PERICOM

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PI74FCT162Q244T
LOW NOISE 16-BIT BUFFER/LINE DRIVER
PI74FCT162Q244T
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
Fast, Low Noise CMOS 16-Bit
Buffer/Line Driver
Product Features:
鈥?V
CC
= 5V 鹵10%
鈥?Balanced output drivers:
鹵12 mA
鈥?Output impedance:
35鈩?(typical)
鈥?Typical V
OLP
(Output Ground Bounce) < 0.5V
at V
CC
= 5V, T
A
= 25擄C
鈥?Bus Hold retains last active bus state during tri-state
鈥?Hysteresis on all inputs
鈥?Packages available:
鈥?48-pin 240 mil wide plastic TSSOP (A)
鈥?48-pin 300 mil wide plastic SSOP (V)
鈥?48-pin 150 mil wide plastic BQSOP (B)
鈥?Device models available on request
Product Description:
Pericom Semiconductor鈥檚 PI74FCT series of logic circuits are pro-
duced in the Company鈥檚 advanced 0.6 micron CMOS technology,
achieving industry leading speed grades.
The PI74FCT162Q244T is a non-inverting 16-bit buffer/line driver
designed for bus interface applications where low noise operation
is essential.
The PI74FCT162Q244T is designed with current limiting resistors
at its outputs to control the output edge rate resulting in lower
ground bounce and undershoot. This device features a typical
output impedance of 35鈩? eliminating the need for external
terminating resistors for most bus interface applications. This noise
suppression benefit is designated by the letter 鈥淨鈥?(for quiet) in the
part number.
The PI74FCT162Q244T also features 鈥淏us Hold鈥?which retains
the input鈥檚 last state whenever the input goes to high-impedance
preventing 鈥渇loating鈥?inputs and eliminating the need for pullup/
down resistors.
This high-speed, low power device also features a flow-through
organization for ease of board layout. These devices are designed
with three-state controls to operate in a Quad-Nibble, Dual-Byte, or
a single 16-bit word mode.
Logic Block Diagram
1
OE
3
OE
1
A
0
1
Y
0
3
A
0
3
Y
0
1
A
1
1
Y
1
3
A
1
3
Y
1
1
A
2
1
Y
2
3
A
2
3
Y
2
1
A
3
1
Y
3
3
A
3
3
Y
3
2
OE
4
OE
2
A
0
2
Y
0
4
A
0
4
Y
0
2
A
1
2
Y
1
4
A
1
4
Y
1
2
A
2
2
Y
2
4
A
2
4
Y
2
2
A
3
2
Y
3
4
A
3
4
Y
3
1
PS2049A 04/12/96

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