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PI74FCT16245T
PI74FCT162245T
PI74FCT162H245T
Fast CMOS 16-Bit
Bidirectional Transceivers
Product Features
Common Features
聲 PI74FCT16245T, PI74FCT162245T and PI74FCT162H245
are high-speed, low-power devices with high-current drive
聲 V
CC
= 5V 鹵 10%
聲 Hysteresis on all inputs
聲 Packages available:
聳 48-pin 240 mil wide plastic TSSOP (A48)
聳 48-pin 173 mil wide plastic TVSOP (JEDEC TSSOP K48)
聳 48-pin 300 mil wide plastic SSOP (V48)
PI74FCT16245T Features
聲 High output drive: I
OH
= 聳32mA; I
OL
= 64mA
聲 Power off disable outputs permit 聯(lián)live insertion聰
聲 Typical V
OLP
(Output Ground Bounce)
< 1.0V at V
CC
= 5V, T
A
= 25擄C
PI74FCT162245T Features
聲 Balanced output drivers: 鹵24mA
聲 Reduced system switching noise
聲 Typical V
OLP
(Output Ground Bounce)
< 0.6V at V
CC
= 5V, T
A
= 25擄C
PI74FCT162H245T Features
聲 Bus Hold retains last active bus state during Three-State
聲 Eliminates the need for external pull-up resistors
Product Description
Pericom Semiconductor聮s PI74FCT series of logic circuits are
produced using the Company聮s advanced 0.6 micron CMOS
technology, achieving industry leading speed grades.
The PI74FCT16245T, PI74FCT162245T, and PI74FCT162H245T
are 16-bit bidirectional transceivers designed for asynchronous
two-way communication between data buses. The direction control
input pin (xDIR) determines the direction of data flow through the
bidirectional transceiver. The Direction and Ouput Enable controls
are designed to operate these devices as either two independent
8-bit transceivers or one 16-bit transceiver. The output enable (OE)
input, when HIGH, disables both A and B ports by placing them in
HIGH Z condition.
The PI74FCT16245T output buffers are designed with a Power-
Off disable allowing 聯(lián)live insertion聰 of boards when used as
backplane drivers.
The PI74FCT162245T has 鹵24mA balanced output drivers. It is
designed with current limiting resistors at its outputs to control the
output edge rate resulting in lower ground bounce and undershoot.
This eliminates the need for external terminating resistors for most
interface applications.
The PI74FCT162H245T has 聯(lián)Bus Hold聰 which retains the input聮s
last state whenever the input goes to high-impedance preventing
聯(lián)floating聰 inputs and eliminating the need for pull-up/down resistors.
Logic Block Diagram
1
DIR
1
OE
1
A
0
1
B
0
1
A
1
1
B
1
1
A
2
1
B
2
1
A
3
1
B
3
1
A
4
1
B
4
1
A
5
1
B
5
1
A
6
1
B
6
1
A
7
1
B
7
2
A
7
2
B
7
2
A
6
2
B
6
2
A
5
2
B
5
2
A
4
2
B
4
2
A
3
2
B
3
2
A
2
2
B
2
2
A
1
2
B
1
2
A
0
2
B
0
2
DIR
2
OE
1
PS2032D
05/17/99
1
2
3
4
5
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