Logic Block Diagram
1
OEBA
2
OEBA
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21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
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PI74FCT16952T/162952/162H952T
PI74FCT16952T
16-BIT REGISTERED TRANSCEIVERS
PI74FCT162952T
PI74FCT162H952T
16-Bit Registered Transceivers
Product Features:
Common Features:
聲 PI74FCT16952T, PI74FCT162952T, and PI74FCT2H952T
are high-speed,
low power devices with high current drive
聲 V
CC
= 5V 鹵10%
聲 Hysteresis on all inputs
聲 Packages available:
聳 56-pin 240 mil wide plastic TSSOP (A)
聳 56-pin 300 mil wide plastic SSOP (V)
PI74FCT16952T Features:
聲 High output drive: I
OH
= 聳32 mA; I
OL
= 64 mA
聲 Power off disable outputs permit 聯(lián)live insertion聰
聲 Typical V
OLP
(Output Ground Bounce) < 1.0V
at V
CC
= 5V, T
A
= 25擄C
PI74FCT162952T Features:
聲 Balanced output drivers: 鹵24 mA
聲 Reduced system switching noise
聲 Typical V
OLP
(Output Ground Bounce) < 0.6V
at V
CC
= 5V, T
A
= 25擄C
PI74FCT162H952T Features:
聲 Bus Hold retains last active bus state during 3-state
聲 Eliminates the need for external pull-up resistors
Product Description:
Pericom Semiconductor聮s PI74FCT series of logic circuits are pro-
duced in the Company聮s advanced 0.6 micron CMOS technology,
achieving industry leading speed grades.
The PI74FCT16952T, PI74FCT162952T, and PI74FCT162H952T
are 16-bit registered transceivers organized with two sets of eight
D-type latches with separate input and output controls for each set.
For data flow from A to B, for example, the A-to-B Enable
(xCEAB) input must be LOW in order to enter data from xAx. The
data present on the A port will be clocked on the B register when
xCLKAB toggles from LOW-to-HIGH. The xOEAB control
performs the output enable function on the B port. Control of data
from B to A is similar, but uses the xCEBA, xCLKBA, and xOEBA
inputs. By connecting the control pins of the two independent
transceivers together, a full 16-bit operation can be achieved. The
output buffers are designed with a Power-Off disable allowing
聯(lián)live insertion聰 of boards when used as backplane drivers.
The PI74FCT16952T output buffers are designed with a Power-
Off disable function allowing 聯(lián)live insertion聰 of boards when used
as backplane drivers.
The PI74FCT162952T has 鹵24 mA balanced output drivers. It is
designed with current limiting resistors at its outputs to control the
output edge rate resulting in lower ground bounce and undershoot.
This eliminates the need for external terminating resistors for most
interface applications.
The PI74FCT162H952T has 聯(lián)Bus Hold聰 which retains the input聮s
last state whenever the input goes to high-impedance preventing
聯(lián)floating聰 inputs and eliminating the need for pull-up/down resistors.
1
CEBA
2
CEBA
1
CLKBA
1
OEAB
1
CEAB
2
CLKBA
2
OEAB
2
CEAB
1
CLKAB
2
CLKAB
C
1
A
0
2
A
0
C
1
B
0
D
C
D
D
C
D
2
B
0
TO 7 OTHER CHANNELS
TO 7 OTHER CHANNELS
1
PS2042A 03/11/96
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2
3
4
5
6
7
