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low power devices with high current drive.
鈥?Power off disable outputs permit 鈥渓ive insertion鈥?/div>
鈥?Typical V
OLP
(Output Ground Bounce) < 1.0V
at V
CC
= 5V, T
A
= 25擄C
PI74FCT162501T Features
鈥?Balanced output drivers: 鹵24 mA
鈥?Reduced system switching noise
鈥?Typical V
OLP
(Output Ground Bounce) < 0.6V
at V
CC
= 5V, T
A
= 25擄C
PI74FCT162H501T Features
鈥?Bus Hold retains last active bus state during 3-state
鈥?Eliminates the need for external pull-up resistors
Product Description
Pericom Semiconductor鈥檚 PI74FCT series of logic circuits are pro-
duced in the Company鈥檚 advanced 0.6 micron CMOS technology,
achieving industry leading speed grades.
The PI74FCT16501T, PI74FCT162501T, and PI74FCT162H501T
are 18-bit are registered bus transceivers designed with D-type
latches and flip-flops to allow data flow in transparent, latched, and
clocked modes. The Output Enable (OEAB and OEBA, Latch
Enable (LEAB and LEBA) and Clock (CLKAB and CLKBA)
inputs control the data flow in each direction. When LEAB is
HIGH, the device operates in transparent mode for A-to-B data
flow. When LEAB is LOW, the A data is latched if CLKAB is held
at a HIGH or LOW logic level. The A bus data is stored in the latch/
flip-flop on the LOW-to-HIGH transition of CLKAB, if LEAB is LOW.
OEAB performs the output enable function on the B port. Data flow
from B port to A port is similar using OEBA, LEBA and CLKBA.
These high-speed, low power devices offer a flow-through
organization for ease of board layout.
The PI74FCT16501T output buffers are designed with a Power-Off
disable allowing "live insertion" of boards when used as backplane
drivers.
The PI74FCT162501T has 鹵24 mA balanced output drivers. It is
designed with current limiting resistors at its outputs to control the
output edge rate resulting in lower ground bounce and undershoot.
This eliminates the need for external terminating resistors for most
interface applications.
The PI74FCT162H501T has 鈥淏us Hold鈥?which retains the input鈥檚
last state whenever the input goes to high-impedance preventing
鈥渇loating鈥?inputs and eliminating the need for pull-up/down resistors.
Logic Block Diagram
OEAB
CLKBA
LEBA
OEBA
CLKAB
LEAB
C
A
1
D
C
B
1
D
C
D
C
D
TO 17 OTHER CHANNELS
1
PS2035A 03/11/96
1
2
3
4
5
6
7
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