21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT16501/162501/162H501T
PI74FCT16501T
18-BIT REGISTERED TRANSCEIVERS
PI74FCT162501T
PI74FCT162H501T
Fast CMOS 18-Bit
Registered Transceivers
Product Features
Common Features:
聲 PI74FCT16501T, PI74FCT162501T, and PI74FCT162H501T
are high-speed,
low power devices with high current drive.
聲 V
CC
= 5V 鹵10%
聲 Hysteresis on all inputs
聲 Packages available
聳 56-pin 240 mil wide plastic TSSOP (A)
聳 56-pin 300 mil wide plastic SSOP (V)
PI74FCT16501T Features
聲 High output drive: I
OH
= 聳32 mA; I
OL
= 64 mA
聲 Power off disable outputs permit 聯(lián)live insertion聰
聲 Typical V
OLP
(Output Ground Bounce) < 1.0V
at V
CC
= 5V, T
A
= 25擄C
PI74FCT162501T Features
聲 Balanced output drivers: 鹵24 mA
聲 Reduced system switching noise
聲 Typical V
OLP
(Output Ground Bounce) < 0.6V
at V
CC
= 5V, T
A
= 25擄C
PI74FCT162H501T Features
聲 Bus Hold retains last active bus state during 3-state
聲 Eliminates the need for external pull-up resistors
Product Description
Pericom Semiconductor聮s PI74FCT series of logic circuits are pro-
duced in the Company聮s advanced 0.6 micron CMOS technology,
achieving industry leading speed grades.
The PI74FCT16501T, PI74FCT162501T, and PI74FCT162H501T are
18-bit registered bus transceivers designed with D-type latches and
flip-flops to allow data flow in transparent, latched, and clocked
modes. The Output Enable (OEAB and OEBA, Latch Enable (LEAB
and LEBA) and Clock (CLKAB and CLKBA) inputs control the data
flow in each direction. When LEAB is HIGH, the device operates in
transparent mode for A-to-B data flow. When LEAB is LOW, the A
data is latched if CLKAB is held at a HIGH or LOW logic level. The
A bus data is stored in the latch/flip-flop on the LOW-to-HIGH
transition of CLKAB, if LEAB is LOW. OEAB performs the output
enable function on the B port. Data flow from B port to A port is similar
using OEBA, LEBA and CLKBA. These high-speed, low power
devices offer a flow-through organization for ease of board layout.
The PI74FCT16501T output buffers are designed with a Power-Off
disable allowing "live insertion" of boards when used as backplane
drivers.
The PI74FCT162501T has 鹵24 mA balanced output drivers. It is
designed with current limiting resistors at its outputs to control the
output edge rate resulting in lower ground bounce and undershoot.
This eliminates the need for external terminating resistors for most
interface applications.
The PI74FCT162H501T has 聯(lián)Bus Hold聰 which retains the input聮s
last state whenever the input goes to high-impedance preventing
聯(lián)floating聰 inputs and eliminating the need for pull-up/down resistors.
Logic Block Diagram
OEAB
CLKBA
LEBA
OEBA
CLKAB
LEAB
C
A
1
D
C
B
1
D
C
D
C
D
TO 17 OTHER CHANNELS
1
PS2035A 03/11/96
1
2
3
4
5
6
7
8
