音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

PI74ALVCT16260A Datasheet

  • PI74ALVCT16260A

  • Bus Exchanger

  • 326.03KB

  • 5頁

  • ETC

掃碼查看芯片數(shù)據(jù)手冊

上傳產(chǎn)品規(guī)格書

PDF預覽

21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCT16260
12-Bit To 24-Bit Multiplexed D-Type Latch
with 3-State Outputs
Product Description
Product Features
路 PI74ALVCT16260 is designed for low voltage operation
路 V
CC
= 2.3V to 3.6V
路 5V tolerant inputs and outputs
路 Hysteresis on all inputs
路 Typical V
OLP
(Output Ground Bounce)
< 0.8V at V
CC
= 3.3V, T
A
= 25擄C
路 Typical V
OHV
(Output V
OH
Undershoot)
< 2.0V at V
CC
= 3.3V, T
A
= 25擄C
路 Industrial operation at 聳40擄C to +85擄C
路 Packages available:
聳 56-pin 240 mil wide plastic TSSOP (A)
聳 56-pin 300 mil wide plastic SSOP (V)
Pericom Semiconductor聮s PI74ALVCT series of logic circuits are
produced in the Company聮s advanced 0.5 micron CMOS technology,
achieving industry leading speed.
The PI74ALVCT16260 is a 12-bit to 24-bit multiplexed D-type latch
designed for 2.3V to 3.6 Vcc operation. It is used in applications
where two separate datapaths must be multiplexed onto, or
demultiplexed from, a single data path.
Typical applications include multiplexing and/or demulti-plexing
address and data information in microprocessor or bus-interface
applications. This device is also useful in memory-interleaving
applications.
Three 12-bit I/O ports (A1-A12, 1B1-1B12, and 2B1-2B12) are available
for address and/or data transfer. The output-enable (OE1B, OE2B,
and OEA) inputs control the bus transceiver functions. The OE1B
and OE2B control signals also allow bank control in the A-to-B
direction.
Address and/or data information can be stored using the internal
storage latches. The latch-enable (LE1B, LE2B, LEA1B, and LEA2B)
inputs are used to control data storage. When the latch-enable input
is HIGH, the latch is transparent. When the latch-enable input goes
LOW, the data present at the inputs is latched and remains latched
until the latch-enable input is returned HIGH.
Logic Block Diagram
LE1B
LE2B
LEA1B
LEA2B
OE2B
2
27
30
55
56
To ensure the high-impedance state during power up or power down,
OE should be tied to Vcc through a pullup resistor, the minimum value
of the resistor is determined by the current-sinking capability of the
driver.
The ALVCT16260 can be driven from either 3.3V or 5V devices
allowing it to be used in mixed 3V/5V systems.
29
OE1B
1
28
G1
A1
8
1
1
C1
23
1D
1
B
1
OEA
SEL
C1
6
1D
2
B
1
C1
1D
C1
1D
TO 11 OTHER CHANNELS
1
PS8131A 03/17/98

PI74ALVCT16260A相關型號PDF文件下載

您可能感興趣的PDF文件資料

熱門IC型號推薦

掃碼下載APP,
一鍵連接廣大的電子世界。

在線人工客服

買家服務:
賣家服務:
技術客服:

0571-85317607

網(wǎng)站技術支持

13606545031

客服在線時間周一至周五
9:00-17:30

關注官方微信號,
第一時間獲取資訊。

建議反饋
返回頂部

建議反饋

聯(lián)系人:

聯(lián)系方式:

按住滑塊,拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見,您的參與是維庫提升服務的動力!意見一經(jīng)采納,將有感恩紅包奉上哦!