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Packages available:
聳 56-pin 240 mil wide plastic TSSOP (A)
聳 56-pin 300 mil wide plastic SSOP (V)
Product Description
Pericom Semiconductor聮s PI74ALVCH series of logic circuits are
produced using the Company聮s advanced 0.5 micron CMOS
technology, achieving industry leading speed.
The PI74ALVCH16524 data flow in each direction is controlled
by output-enable (OEAB and OEBA) and clock-enable
(CLKENBA) inputs. For the A-to-B data flow, the data flows
through a single buffer. The B-to-A data can flow through a four-
stage pipeline register path, or through a single register path,
depending on the state of the select (SEL) input.
Data is stored in the internal registers on the low-to-high
transition of the clock (CLK) input, provided that the appropriate
CLKENBA input is low. The B-to-A data transfer is synchronized
with CLK.
To ensure the high-impedance state during power up or power
down, OE should be tied to Vcc through a pull-up resistor; the
minimum value of the resistor is determined by the current-sinking
capability of the driver.
The PI74ALVCH16524 has 聯(lián)Bus Hold聰 which retains the data
input聮s last state whenever the data input goes to high-impedance
preventing 聯(lián)floating聰 inputs and eliminating the need for pullup/
down resistors.
Logic Block Diagram
CLK
CLKENBA
OEAB
OEBA
SEL
30
28
2
27
55
1 of 18 Channels
CE
A1
G1
1
1
CE
C1
1D
CE
C1
1D
CE
C1
1D
3
C1
1D
54
B1
To 17 Other Channels
1
PS8447A
11/06/00
1
2
3
4
5
6
7
