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PI74ALVCH16240A Datasheet

  • PI74ALVCH16240A

  • Quad 4-Bit Buffer/Driver

  • 4頁

  • ETC

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PI74ALVCH16240
Product Features
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PI74ALVCH16240 is designed for low voltage operation
V
CC
= 2.3V to 3.6V
Hysteresis on all inputs
Typical V
OLP
(Output Ground Bounce)
< 0.8V at V
CC
= 3.3V, T
A
= 25擄C
Typical V
OHV
(Output V
OH
Undershoot)
< 2.0V at V
CC
= 3.3V, T
A
= 25擄C
Bus Hold retains last active bus state during 3-State,
eliminating the need for external pullup resistors
Industrial operation at 聳40擄C to +85擄C
Packages available:
聳 48-pin 240 mil wide plastic TSSOP (A)
聳 48-pin 300 mil wide plastic SSOP (V)
Product Description
Inverting 16-Bit Buffer Driver
with 3-State Outputs
Pericom Semiconductor聮s PI74ALVCH series of logic circuits
are produced in the Company聮s advanced 0.5 micron CMOS
technology, achieving industry leading speed.
The PI74ALVCH16240 is an inverting 16-bit buffer/driver
designed for low voltage 2.3V to 3.6V V
CC
operation.
The buffer/driver is designed specifically to improve both the
performance and density of 3-State memory address drivers, clock
drivers, and bus-oriented receivers and transmitters.
The device can be used as four 4-bit buffers, two 8-bit buffers, or
one 16-bit buffer. It provides inverting outputs and symmetrical
active-low output-enable (OE) inputs.
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pullup resistor in which
the minimum value is determined by the current-sinking capabil-
ity of the driver.
The PI74ALVCH16240 has 聯(lián)Bus Hold聰 which retains the data
input聮s last state whenever the data input goes to high-impedance
preventing 聯(lián)floating聰 inputs and eliminating the need for pullup/
down resistors.
Logic Block Diagram
1
PS8086B 10/07/98

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