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PI6C2310 Datasheet

  • PI6C2310

  • Low skew, low jitter, PLL clock buffer with divider or multi...

  • 138.81KB

  • 5頁

  • PERICOM   PERICOM

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PI6C2310
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21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PCI-X Clock Buffers
Product Features
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Four synchronous outputs
Selectable divider/multiplier
Output Enable control
Low phase error < 150 ps
Allows clock input to have spread spectrum modulation for
EMI reduction
Low output skew < 200 ps
Low cycle jitter < 200 ps
Industrial temperature (鈥?0擄 C to 85擄 C)
3.3V V supply
Packages: 24-pin QSOP (Q) and 24-pin TSSOP (L)
Product Description
PI6C2310 is a low skew, low jitter, PLL clock buffer with divider or
multiplier designed for PCI-X application in servers and worksta-
tions. There are two selectable input ranges using HF# input: 10-40
MHz and 40-80 MHz. All outputs are synchronized to the input and
to the other outputs. Each output can be independently turned off
to reduce EMI and power consumption.
Block Diagram
Pin Configuration
AGND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
CLKIN
AV
CC
V
CC
OUT0
OUT1
GND
GND
OUT2
OUT3
V
CC
OE3
OE2
OUT0
OUT1
OUT2
OUT3
PLL
DIV
FBOUT
V
CC
HF#
DIV0
DIV1
GND
GND
FBIN
FBOUT
V
CC
OE0
OE1
OE[0:3]
HF#
CLKIN
FBIN
DIV[0:1]
24-Pin
Q, L
19
18
17
16
15
14
13
20
Clock Select Table
HF#
1
1
1
1
0
0
0
0
DIV1
1
1
0
0
1
1
0
0
DIV0
1
0
1
0
1
0
1
0
OUTx
CLKIN
2xCLKIN
33MHz
3xCLKIN
4xCLKIN
CLKIN/2
CLKIN
66MHz
1.5xCLKIN
2xCLKIN
100MHz
133MHz
100MHz
133MHz
33MHz
66MHz
CLKIN
OUTx
33MHz
66MHz
1
PS8502
10/10/00

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