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Packaging (Pb-free & Green available):
-16-pin TSSOP (L)
- 16-pin QSOP (Q)
Description
The PI6C185-01 is a high-speed low-noise 1-5 non-inverting buffer
designed for SDRAM clock buffer applications.
This buffer is intended to be used with the PI6C10X clock generator
for Intel Architecture-based Mobile systems.
At power-up, all SDRAM outputs are enabled and active. The I
2
C
Serial control may be used to individually activate/deactivate any
of the 5 output drivers.
Note:
Purchase of I2C components from Pericom conveys a license to
use them in an I2C system as defined by Philips廬.
Block Diagram
SDRAM0
Pin Configuration
SDRAM1
BUF_IN
SDRAM2
V
DD
SDRAM0
SDRAM1
V
SS
BUF_IN
V
DD
SDATA
SCLK
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
DD
SDRAM4
V
SS
V
DD
SDRAM3
SDRAM2
V
SS
V
SS
SDRAM3
SDRAM4
SDATA
SCLOCK
I2C
I/O
1
PS8318E
10/14/04