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PI6C104

Spread Spectrum Clock Synthesizer

for Desktop Pentium II

Features

鈥?/div>

Up to 112 MHz operation

鈥?/div>

Spread Spectrum Modulation for CPUCLK, and PCICLK

鈥?/div>

Two copies of CPU clock with V

DD

of 2.5V 鹵5%

鈥?/div>

Seven copies of PCI clock,

(synchronous with CPU clock) 3.3V

鈥?/div>

One copy of Ref. clock @ 14.31818MHz (3.3V

TTL

)

鈥?/div>

48MHz USB Clock, 24MHz Super I/O clock

鈥?/div>

I

2

C Serial Configuration Interface

鈥?/div>

Low cost 14.31818MHz crystal oscillator input

鈥?/div>

Power management control

鈥?/div>

Isolated core V

DD

, V

SS

pins for noise reduction

鈥?/div>

28-pin SSOP (H) and SOIC package (S)

Description

The PI6C104 is a high-speed low-noise clock generator designed

to work with the PI6C18X family of clock buffer to meet all clock

needs for Desktop Intel Architecture platforms. CPU and chipset

clock frequencies from 66.6 MHz to 112 MHz are supported.

Split supplies of 3.3V and 2.5V are used. The 3.3V power supply

powers a portion of the I/O and the core. The 2.5V is used to power

the remaining outputs (CPU and APIC). 2.5V signaling follows

JEDEC standard 8-X. Power sequencing of the 3.3V and 2.5V

supplies is not required.

An asynchronous PD# signal may be used to orderly power down

(or up) the system during power on.

Block Diagram

V

DDAPIC

APIC

Pin Configuration

XTAL_IN

XTAL_OUT

VSS

PCICLK_F/S1

V

DDCPU

2

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

VSS

REF1/P14

VDD

VDD2

APIC

VDD2

CPUCLK0

CPUCLK1

VDD

VSS

SDATA

SCLK

S0

VSS

V

DDREF

XTAL_IN

XTAL_OUT

REF

OSC

REF1

PCICLK1

CPUCLK[0:1]

SEL

PLL1

S[0..2]

Div

V

DDPCI

0,1

6

PCICLK2

PCICLK3

28-Pin

H, S

PCICLK[1:6]

PCICLK4

VDD

PCICLK5

PCICLK6/PD#

VDD

48M/MODE

24M/REF/S2

S

DATA

SCLOCK

I

2

C

PCICLK_F

V

DDP

2

PLL2

48MHz

MUX

PI4

24MHz/REF

234

PS8164B

03/15/99

型號(hào)

版本

描述

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