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PECL_RX_C3 Datasheet

  • PECL_RX_C3

  • CMOS PECL Receiver

  • 283.13KB

  • 6頁

  • AMSCO

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ANALOG IP BLOCK
PECL_RX - CMOS PECL Receiver
DATA SHEET
PROCESS
C35B3 (0.35um)
DESCRIPTION
The PECL_RX is a 3.3 V PECL differential line receiver
featuring an operating frequency up to 311 MHz (622 Mb/s)
and accepting standard F100K levels (referred to the positive
supply).
mm
2
,
The PECL_RX accepts (750 mV) differential input signals and
translates them to CMOS output levels.
With the companion line driver (PECL_TX ) it can be used for
high speed applications.
The cell PECL_RX requires the PERXBIAS cell for biasing.
PERXBIAS can drive up to 3 PECL_RX cells. An external
voltage reference must be used.
The PECL_RX can be set in power down mode.
FEATURES
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PECL_RX area: 0.1
size: x = 300
碌m
y = 340
碌m
PERXBIAS
size: x = 382
碌m
y = 375
碌m
3.3 V 鹵10% supply voltage
622 Mb/s transmission speed
1 ns max. propagation delay
Power dissipation 23 mW at 3.3 V static without
PERXBIAS
Junction temperature 鈥?0 - 125擄C
Output levels fully compatible with F100K PECL
Family
Power down mode
Revision B, 10.09.02
Page 1 of 6

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