鈥?/div>
GND
data
3
廬
delay
devices,
inc.
PACKAGES
32
31
GND
OUT
Digitally programmable in 32 delay steps
Monotonic delay-versus-address variation
Precise and stable delays
Input & outputs fully 10KH-ECL interfaced & buffered
Fits 32-pin DIP socket
1
2
ENB
A0
VEE
GND
IN
7
8
9
11
26
25
24
A1
A2
GND
N/C
N/C
OUT
GND
ENB
N/C
N/C
N/C
GND
ENB
N/C
IN
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
N/C
N/C
A2
A1
VEE
A0
N/C
N/C
A4
VEE
A3
N/C
PDU1032H-xxC4 SMD
PDU1032H-xxMC4 Mil SMD
PDU1032H-xx DIP
PDU1032H-xxM Mil DIP
A3
VEE
15
16
17
A4
FUNCTIONAL DESCRIPTION
The PDU1032H-series device is a 5-bit digitally programmable delay line.
The delay, TD
A
, from the input pin (IN) to the output pin (OUT) depends
on the address code (A4-A0) according to the following formula:
PIN DESCRIPTIONS
IN
Signal Input
OUT Signal Output
A0-A4 Address Bits
ENB Output Enable
VEE -5 Volts
TD
A
= TD
0
+ T
INC
* A
GND Ground
where A is the address code, T
INC
is the incremental delay of the device, and TD
0
is the inherent delay of
the device. The incremental delay is specified by the dash number of the device and can range from
0.5ns through 20ns, inclusively. The enable pin (ENB) is held LOW during normal operation. When this
signal is brought HIGH, OUT is forced into a LOW state. The address is not latched and must remain
asserted during normal operation.
SERIES SPECIFICATIONS
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Total programmed delay tolerance:
5% or 2ns,
whichever is greater
Inherent delay (TD
0
):
5.5ns typical for dash numbers
up to 5, greater for larger #鈥檚
Setup time and propagation delay:
Address to input setup (T
AIS
):
3.6ns
Disable to output delay (T
DISO
):
1.7ns typical
Operating temperature:
0擄 to 70擄 C
Temperature coefficient:
100PPM/擄C (excludes TD
0
)
Supply voltage V
EE
:
-5VDC
鹵
5%
Power Dissipation:
615mw typical (no load)
Minimum pulse width:
20% of total delay
DASH NUMBER SPECIFICATIONS
Part
Number
PDU1032H-.5
PDU1032H-1
PDU1032H-2
PDU1032H-3
PDU1032H-4
PDU1032H-5
PDU1032H-6
PDU1032H-8
PDU1032H-10
PDU1032H-12
PDU1032H-15
PDU1032H-20
Incremental Delay
Per Step (ns)
0.5
鹵
0.3
1.0
鹵
0.5
2.0
鹵
0.5
3.0
鹵
1.0
4.0
鹵
1.0
5.0
鹵
1.0
6.0
鹵
1.0
8.0
鹵
1.0
10.0
鹵
1.5
12.0
鹵
1.5
15.0
鹵
1.5
20.0
鹵
2.0
Total
Delay (ns)
15.5
鹵
2.0
31
鹵
2.0
62
鹵
3.1
93
鹵
4.6
124
鹵
6.2
155
鹵
7.8
186
鹵
9.3
248
鹵
12.4
310
鹵
15.5
372
鹵
18.6
465
鹵
23.2
620
鹵
31.0
NOTE: Any dash number between .5 and 20
not shown is also available.
漏
1997 Data Delay Devices
Doc #97045
12/17/97
Powered by ICminer.com Electronic-Library Service CopyRight 2003
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
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PDU1032H-.5M相關(guān)型號(hào)PDF文件下載
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