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PBL386652QNT Datasheet

  • PBL386652QNT

  • Subscriber Line Interface Circuit

  • 18頁

  • ERICSSON

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Preliminary
May 2000
PBL 386 65/2
Subscriber Line
Interface Circuit
Description
The PBL 386 65/2 Subscriber Line Interface Circuit (SLIC) is a 90 V bipolar integrated
circuit for use in DLC, Central Office and other telecommunications equipment. The
PBL 386 65/2 has been optimized for low total line interface cost and a high degree
of flexibility in different applications.
The PBL 386 65/2 emulates a transformer equivalent dc-feed, programmable
between 2x25
鈩?/div>
and 2x900
鈩?
with short loop current limiting adjustable to max
65 mA.
A second lower battery voltage may be connected to the device to reduce short
loop power dissipation. The SLIC automatically switches between the two battery
supply voltages without need for external components or external control.
The SLIC incorporates loop current, ground key and ring trip detection functions. The
PBL 386 65/2 is compatible with loop start and ground start signalling.
Two- to four-wire and four- to two-wire voice frequency (vf) signal conversion is
accomplished by the SLIC in conjunction with either a conventional CODEC/filter or
with a programmable CODEC/filter, e.g. SLAC, SiCoFi, Combo II. The programmable
line terminating impedance could be complex or real to fit every market.
Longitudinal line voltages are suppressed by a feedback loop in the SLIC and the
longitudinal balance specifications meet the DLC requirements.
The PBL 386 65/2 package is 28-pin PLCC and 28-pin SSOP.
Key Features
鈥?Selectable overhead voltage principle
鈥?All adaptive: The overhead voltage
follows 0.6
Peak
V < signals < 6.2V
Peak
.
鈥?Semi adaptive: The overhead voltage
follows 3.1V
Peak
< signals < 6.2V
Peak
.
鈥?Metering 2.2 V
rms
鈥?High and low battery with automatic
switching
鈥?Battery supply as low as -10 V
鈥?Only +5 V in addition to GND
and battery (VEE optional)
鈥?39 mW on-hook power dissipation in
active state
鈥?Long loop battery feed tracks V
Bat
for
maximum line voltage
鈥?44V open loop voltage @ -48V
battery feed
鈥?Constant loop voltage for line
leakage <5 mA
鈥?On-hook transmission
鈥?Full longitudinal current capability
during on-hook
Ring Relay
Driver
RRLY
鈥?Programmable loop & ring-trip detector
threshold
鈥?Ground key detector
鈥?Analog temperature guard
鈥?Tip open state with ring ground detector
鈥?Silent polarity reversal
鈥?Line voltage measurement
鈥?-40擄 C to +85擄 C ambient temperature
range
DT
DR
TIPX
RINGX
HP
TS
Ring Trip
Comparator
Input
Decoder and
Control
C1
C2
C3
VCC
DET
Ground Key
Detector
Two-wire
Interface
AOV
VBAT2
VBAT
Line Feed
Controller
and
Longitudinal
Signal
Suppression
PSG
LP
REF
Off-hook
Detector
PLD
AGND
VTX
38 PB
6 L
65
/2
PLC
BGND
VF Signal
Transmission
RSN
VEE
(Optional)
PBL
3
5/
86 6
2
Figure 1. Block diagram.
28-pin PLCC and 28-pin SSOP.
1

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