CALIFORNIA MICRO DEVICES
Features
聲 Six channels of ESD protection
聲 Integral Zener diode clamp to suppress
supply rail transient
聲 15KV ESD protection (HBM)
聲 8KV contact, 15KV air ESD protection
per IEC 61000-4-2
聲 Low loading capacitance, 3pF typ
聲 Miniature 8-pin MSOP or SOIC package
6 CHANNEL ESD PROTECTION ARRAY WITH ZENER SUPPLY CLAMP
Applications
聲 I/O port protection for cellular
phones, notebook computers, PDAs, etc.
聲 ESD protection for VGA (Video) port in
PC聮s or Notebook computers.
聲 ESD protection for sensitive
electronic equipment.
PAC DN016
Product Description
The PAC聶 DN016 is a diode array designed to provide 6 channels of ESD protection for electronic components or sub-
systems. Each channel consists of a pair of diodes which steers the ESD current pulse either to the positive (V
P
) or
negative (V
N
) supply. In addition, there is an integral Zener diode between V
P
and V
N
to suppress any voltage
disturbance due to these ESD current pulses. The PAC DN016 will protect against ESD pulses up to 15KV Human
Body Model, and 8KV contact discharge per International Standard IEC 61000-4-2.
This device is particularly well-suited for portable electronics (e.g. cellular phones, PDAs, notebook computers) because of
its small package footprint, high ESD protection level, and low loading capacitance. It is also suitable for protecting video
output lines and I/O ports in computers and peripheral equipment.
ABSOLUTE MAXIMUM RATINGS
SCHEMATIC CONFIGURATION
Diode Forward DC Current
(Note 1)
20mA
Storage Temperature
-65擄C to 150擄C
Operating Temperature Range
-20擄C to 85擄C
DC Voltage at any Channel Input V
N
-0.5V to V
P
+0.5V
Note 1: Only one diode conducting at a time.
Parameter
Operating Supply Voltage ( V
P
-V
N
)
Supply Current @ V
P
-V
N
= 5.5V
D iode Forward Voltage, I
F
= 20mA, T = 25擄C
Zener clamp reverse breakdown voltage @ 1mA, T = 25擄C
ESD Protection
Peak D ischarge Voltage at any Channel Input, in-system
(Note 2)
000
Human Body Model, Method 3015
(Note 3, 4)
000
Contact D ischarge per IEC 61000-4-2
(Note 5)
Channel Clamp Voltage @ 15KV ESD HBM, T = 25擄C
000
Positive transients
000
Negative transients
Channel Leakage Current, T = 25擄C
Channel Input Capacitance (Measured @ 1 MHz)
V
P
= 5V, V
N
= 0V, V
I N P U T
= 2 .5 V
(Note 4)
Package Power Rating
000
SOIC Package
000
MSOP Package
Note 2:
Note 3:
Note 4:
Note 5:
11/99
STANDARD SPECIFICATIONS
Min.
0.65V
Typ.
6.6V
Max.
5.5V
20碌 A
0.95V
鹵
15KV
鹵
8KV
(Notes 3, 4)
鹵0.1碌A(chǔ)
3pF
V
P
+ 13.0V
V
N
- 13.0V
鹵1.0 碌A(chǔ)
6pF
350mW
200mW
From I/O pins to V
P
or V
N
only. Bypass opacitor between V
P
and V
N
is not required. However, a 0.2
碌F
ceramic chip
capacitor bypassing V
P
to V
N
is recommended if the lowest possible channel clamp voltage is desired.
Human Body Model per MIL-STD-883, Method 3015, C
Discharge
=100pF, R
Discharge
=1.5K
鈩?/div>
, V
P
=5.0V, V
N
=GND.
This parameter is guaranteed by design and characterization.
Standard IEC 61000-4-2 with C
Discharge
=150pF, and R
Discharge
=330
鈩?/div>
, V
P
=5V, V
N
=GND.
C0540399
漏 1999 Calirornia Micro Devices Corp. All rights reserved. PAC聶 is a trademark of California Micro Devices Corp.
215 Topaz Street, Milpitas, California 95035
Tel: (408) 263-3214
Fax: (408) 263-7846
www.calmicro.com
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