PA7540 PEEL Array鈩?/div>
Programmable Electrically Erasable Logic Array
Most Powerful 24-pin PLD Available
- 20 I/Os, 2 inputs/clocks, 40 registers/latches
- 40 logic cell output functions
- PLA structure with true product-term sharing
- Logic functions and registers can be I/O-buried
Ideal for Combinatorial, Synchronous and
Asynchronous Logic Applications
- Integration of multiple PLDs and random logic
- Buried counters, complex state-machines
- Comparators, decoders, multiplexers and other wide-
gate functions
High-Speed Commercial and Industrial Versions
- As fast as 10ns/15ns (tpdi/tpdx), 71.4MHz (f
MAX
)
- Industrial grade available for 4.5 to 5.5V V
CC
and
-40 to +85 擄C temperatures
CMOS Electrically Erasable Technology
- Reprogrammable in 24-pin DIP, SOIC and
28-pin PLCC packages
- Optional JN package for 22V10 power/ground
compatibility
Flexible Logic Cell
- 2 output functions per logic cell
- D,T and JK registers with special features
- Independent or global clocks, resets, presets,
clock polarity and output enables
- Sum-of-products logic for output enables
Development and Programmer Support
- Anachip鈥檚 WinPLACE Development Software
- Fitters for ABEL, CUPL and other software
- Programming support by popular third-party
programmers
presets, clock polarity, and other features, making the
PA7540 suitable for a variety of combinatorial,
synchronous and asynchronous logic applications. With pin
compatibility and super-set functionality to most 24-pin
PLDs, (22V10, EP610/630, GAL6002), the PA7540 can
implement designs that exceed the architectures of such
devices. The PA7540 supports speeds as fast as
10ns/15ns (tpdi/tpdx) and 71.46MHz (f
MAX
) at moderate
power consumption 80mA (55mA typical). Packaging
includes 24-pin DIP, SOIC and 28-pin PLCC (see Figure
1). Anachip and popular third-party development tool
manufacturers provide development and programming
support for the PA7540.
General Description
The PA7540 is a member of the Programmable Electrically
Erasable Logic (PEEL鈩? Array family based on ICT鈥檚
CMOS EEPROM technology. PEEL鈩?Arrays free
designers from the limitations of ordinary PLDs by
providing the architectural flexibility and speed needed for
today鈥檚 programmable logic designs. The PA7540 is by far
the most powerful 24-pin PLD available today with 20 I/O
pins, 2 input/global-clocks and 40 registers/latches (20
buried logic cells and 20 I/O registers/latches). Its logic
array implements 84 sum-of-products logic functions. The
PA7540鈥檚 logic and I/O cells (LCCs, IOCs) are extremely
flexible offering two output functions per cell (a total of 40
for all 20 logic cells). Logic cells are configurable as D, T,
and JK registers with independent or global clocks, resets,
Figure 1. Pin Configuration
I/C LK1
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VC C
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/C LK2
I/C LK1
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VC C
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/C LK2
Figure 2. Block Diagram
2 Input/
G lobal C lock P ins
G lobal
C ells
84 (42X2)
A rray Inputs
true and
com plem ent
20
B uried
logic
Logic functions
to I/O cells
2
I/C L K 1
I/O
I/O
I/O
I/O
I/O
G lo b a l C e lls
I/O C e lls
VC C
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
L o g ic
Arr ay
I/O
C ells
(IO C )
20 I/O P ins
SO IC
I/CLK1
20
Logic
C ontrol
C ells
(LC C )
I/CLK1
DIP
I/O
I/O
I/O
I/O
I/O
25
24
23
22
21
20
19
I/O
I/O
I/O
NC
I/O
I/O
I/O
L o g ic C o n tro l C e lls
I/O
I/O
G ND
A
B
C
D
VCC
VCC
VCC
NC
I/O
I/O
I/O
I/O
I/O
I/O
20
20
4
I/O
I/O
I/O
NC
I/O
I/O
I/O
5
6
7
8
9
10
11
3
2
1
28 27 26
25
24
23
22
21
20
19
I/O
I/O
I/O
NC
I/O
I/O
I/O
I/O
I/O
I/O
NC
I/O
I/O
I/O
5
6
7
8
9
10
11
4
3
2
1 28 27 26
PA7540
I/C L K 2
4 sum term s
4 product term s
for G lobal C ells
80 sum term s
(four per LC C )
20 Logic C ontrol Cells
2 output functions per cell
(40 total output functions possible)
0 8 -1 4 -0 02 A
1 2 1 3 1 4 1 5 1 6 1 71 8
12 13 14 15 16 17 18
GND
GND
GND
I/CLK2
NC
I/CLK2
I/O
I/O
I/O
I/O
I/O
I/O
I/O
PLCC -J
I/O
PLCC -JN
08-14-001B
1
04-02-051B
ANACHIP
1
2
3
4
5
6
7
8
9
10
