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P89LPC9401FBD Datasheet

  • P89LPC9401FBD

  • 8-bit microcontroller with accelerated two-clock 80C51 core ...

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P89LPC9401
8-bit microcontroller with accelerated two-clock 80C51 core
8 kB 3 V byte-erasable 鏗俛sh with 32 segment
脳
4 LCD driver
Rev. 01 鈥?5 September 2005
Preliminary data sheet
1. General description
The P89LPC9401 is a multi-chip module consisting of a P89LPC931 single-chip
microcontroller combined with a PCF8576D universal LCD driver in a low-cost 64-pin
package. The LCD driver provides 32 segments and supports from 1 to 4 backplanes.
Display overhead is minimized by an on-chip display RAM with auto-increment
addressing.
2. Features
2.1 Principal features
s
8 kB byte-erasable 鏗俛sh code memory organized into 1 kB sectors and 64-byte pages.
Single-byte erasing allows any byte(s) to be used as non-volatile data storage.
s
256-byte RAM data memory.
s
32 segment
脳
4 backplane LCD controller supports from 1 to 4 backplanes.
s
Two analog comparators with selectable inputs and reference source.
s
Two 16-bit counter/timers (each may be con鏗乬ured to toggle a port output upon timer
over鏗俹w or to become a PWM output) and a 23-bit system timer that can also be used
as a Real-Time Clock (RTC).
s
Enhanced UART with fractional baud rate generator, break detect, framing error
detection, and automatic address detection; 400 kHz byte-wide I
2
C-bus
communication port and SPI communication port.
s
High-accuracy internal RC oscillator option allows operation without external oscillator
components. The RC oscillator option is selectable and 鏗乶e tunable.
s
2.4 V to 3.6 V V
DD
operating range. I/O pins are 5 V tolerant (may be pulled up or
driven to 5.5 V).
s
64-pin LQFP package with 20 microcontroller I/O pins minimum and up to 23
microcontroller I/O pins while using on-chip oscillator and reset options.
s
Serial 鏗俛sh In-Circuit Programming (ICP) allows simple production coding with
commercial EPROM programmers. Flash security bits prevent reading of sensitive
application programs.
2.2 Additional features
s
A high performance 80C51 CPU provides instruction cycle times of 111 ns to 222 ns
for all instructions except multiply and divide when executing at 18 MHz. This is six
times the performance of the standard 80C51 running at the same clock frequency. A
lower clock frequency for the same performance results in power savings and reduced
EMI.

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