P89LPC9381
8-bit microcontroller with accelerated two-clock 80C51 core
4 kB 3 V byte-erasable 鏗俛sh with 10-bit ADC
Rev. 01 鈥?8 September 2006
Product data sheet
1. General description
The P89LPC9381 is a single-chip microcontroller, available in low-cost packages, based
on a high performance processor architecture that executes instructions in two to four
clocks, six times the rate of standard 80C51 devices. Many system-level functions have
been incorporated into the P89LPC9381 in order to reduce component count, board
space, and system cost.
2. Features
2.1 Principal features
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4 kB byte-erasable 鏗俛sh code memory organized into 1 kB sectors and 64 B pages.
Single-byte erasing allows any byte(s) to be used as non-volatile data storage.
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256 B RAM data memory on-chip RAM.
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8-input multiplexed 10-bit ADC. Two analog comparators with selectable inputs and
reference source.
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Two 16-bit counter/timers (each may be con鏗乬ured to toggle a port output upon timer
over鏗俹w or to become a PWM output) and a 23-bit system timer that can also be used
as a RTC.
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Enhanced UART with fractional baud rate generator, break detect, framing error
detection, and automatic address detection; 400 kHz byte-wide I
2
C-bus
communication port and SPI communication port.
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High-accuracy internal RC oscillator option allows operation without external oscillator
components. The RC oscillator option is selectable and 鏗乶e tunable.
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2.4 V to 3.6 V V
DD
operating range. I/O pins are 5 V tolerant (may be pulled up or
driven to 5.5 V).
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28-pin TSSOP package with 23 I/O pins minimum and up to 26 I/O pins while using
on-chip oscillator and reset options.