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P1817A-08ST Datasheet

  • P1817A-08ST

  • Low-Power Mobile VGA EMI Reduction IC

  • 10頁

  • ALSC

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October 2003
rev 1.0
Low-Power Mobile VGA EMI Reduction IC
Features
FCC approved method of EMI attenuation.
Generates a low EMI spread spectrum clock of the
input frequency.
Optimized for frequency range from:
o
o
P1817A 鈥?20 to 30MHz. Operation
P1817B 鈥?10 to 20MHz Operation
P1817A/B
down stream clock and data dependent signals. The P1817
allows significant system cost savings by reducing the
number of circuit board layers ferrite beads, shielding and
other passive components that are traditionally required to
pass EMI regulations.
The P1817 modulates the output of a single PLL in order to
鈥渟pread鈥?the bandwidth of a synthesized clock, and more
importantly,
decreases
the
peak
amplitudes
of
its
harmonics. This results in significantly lower system EMI
compared to the typical narrow band signal produced by
oscillators and most frequency generators. Lowering EMI
by increasing a signal鈥檚 bandwidth is called 鈥榮pread
spectrum clock generation鈥?
The P1817 uses the most efficient and optimized
modulation
profile
approved
by
the
FCC
and
is
implemented in a proprietary all digital method.
Internal loop filter minimizes external components
and board space.
Two selectable spread ranges.
Low inherent cycle-to-cycle jitter.
3.3V or 5V operating voltage range.
TTL or CMOS compatible outputs.
Ultra-low power CMOS design.
3.17mA @3.3V, 10MHz | 6.20mA@5.0V, 10MHz
4.28mA @3.3V, 14MHz | 7.50mA @5.0V, 14MHz
5.50mA @3.3V, 20MHz | 9.50mA @5.0V, 20MHz
Supports notebook VGA and other LCD timing
controller applications.
SSON pin for Spread Spectrum On/Off and
Standby Mode controls.
Available in 8-pin SOIC and TSSOP.
Applications
The P1817 is targeted towards notebook VGA chip and
other displays using an LVDS interface, PC peripheral
devices, and embedded systems.
Product Description
The P1817 is a versatile spread spectrum frequency
modulator designed specifically for input clock frequencies.
The P1817 reduces electromagnetic interference (EMI) at
the clock source, allowing system wide reduction of EMI of
SR0
SSON
Block Diagram
VDD
Modulation
XIN
Crystal
Oscillator
XOUT
Frequency
Divider
Feedback
Divider
Ref
Phase
Detector
Loop
Filter
PLL
VCO
Output
Divider
ModOUT
VSS
Alliance Semiconductor
2575, Augustine Drive
鈥?/div>
Santa Clara, CA
鈥?/div>
Tel: 408.855.4900
鈥?/div>
Fax: 408.855.4999
鈥?/div>
www.alsc.com
Notice: The information in this document is subject to change without notice.

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