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OP177FS-REEL7 Datasheet

  • OP177FS-REEL7

  • Ultraprecision Operational Amplifier

  • 16頁

  • AD

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Ultraprecision
Operational Amplifier
OP177
FEATURES
Ultralow offset voltage
T
A
= 25擄C, 25 渭V maximum
Outstanding offset voltage drift 0.1 渭V/擄C maximum
Excellent open-loop gain and gain linearity
12 V/渭V typical
CMRR: 130 dB minimum
PSRR: 115 dB minimum
Low supply current 2.0 mA maximum
Fits industry-standard precision op amp sockets
PIN CONFIGURATION
V
OS
TRIM
1
鈥揑N
2
+IN
3
OP177
8
7
V
OS
TRIM
V+
NC = NO CONNECT
Figure 1. 8-Lead PDIP (P-Suffix),
8-Lead SOIC (S-Suffix)
GENERAL DESCRIPTION
The OP177 features one of the highest precision performance of
any op amp currently available. Offset voltage of the OP177 is
only 25 渭V maximum at room temperature. The ultralow V
OS
of
the OP177 combines with its exceptional offset voltage drift
(TCV
OS
) of 0.1 渭V/擄C maximum to eliminate the need for
external V
OS
adjustment and increases system accuracy over
temperature.
The OP177 open-loop gain of 12 V/渭V is maintained over the
full 鹵10 V output range. CMRR of 130 dB minimum, PSRR of
120 dB minimum, and maximum supply current of 2 mA are
just a few examples of the excellent performance of this
operational amplifier. The combination of outstanding
specifications of the OP177 ensures accurate performance in
high closed-loop gain applications.
This low noise, bipolar input op amp is also a cost effective
alternative to chopper-stabilized amplifiers. The OP177
provides chopper-type performance without the usual problems
of high noise, low frequency chopper spikes, large physical size,
limited common-mode input voltage range, and bulky external
storage capacitors.
The OP177 is offered in the 鈭?0擄C to +85擄C extended industrial
temperature ranges. This product is available in 8-lead PDIP, as
well as the space saving 8-lead SOIC.
FUNCTIONAL BLOCK DIAGRAM
V+
R
2A
*
R
1A
2B
Q
9
Q
7
NONINVERTING
INPUT
R
3
Q
5
Q
3
Q
1
Q
21
INVERTING
INPUT
R
4
Q
22
Q
23
Q
24
Q
2
Q
14
Q
13
V鈥?/div>
*R
2A
AND R
2B
ARE ELECTRONICALLY ADJUSTED ON CHIP AT FACTORY.
R
6
Q
6
Q
8
Q
4
Q
27
Q
26
Q
25
C
3
R
5
Q
11
C
2
Q
12
Q
17
Q
16
Q
10
R
9
OUTPUT
R
10
Q
20
Q
15
Q
18
R
8
00289-002
(OPTIONAL NULL)
R
2B
*
R
1B
C
1
R
7
Q
19
Figure 2. Simplified Schematic
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
漏2006 Analog Devices, Inc. All rights reserved.
00289-001
6
OUT
TOP VIEW
5
NC
V鈥?/div>
4
(Not to Scale)

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