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NW6006

DESCRIPTION

The NW6006 device is a single-chip, 3/5 Volt CMOS caller ID with

call waiting detection circuit. It can receive signals following Bellcore

GR-30-CORE & SR-TSV-002476, BT SIN227 & SIN242, and ETSI

ETS 300 788-1/-2 specifications.

The NW6006 provides 1200 baud Bell 202 and ITU-T V.23 FSK

demodulation, detection in stutter dial tone mode and CAS/DT-AS

detection. Two seperate differential input amplifiers allow the device to

be connected with both Tip/Ring and Telephone Hybrid receive pair.

FSK demodulation is implemented only on Tip/Ring, while DT-AS(or

CAS) detection can be on either Tip/Ring or Hybrid Receive. In

addition, NW6006 provides a serial FSK data interface via which the

data can be selected to be processed as a bit stream or extracted

from a 1 byte built-in buffer. An on-chip Stutter Dial Tone Detector is

provided to support the voice mail applications.

The device can be used in feature or cordless phones with voice

mail for BT Calling Line Identity Presentation (CLIP), CCA CLIP and

Bellcore Calling Identity Delivery (CID) systems. It can also be used in

caller ID boxes, modem, fax machines, answering machines,

database query systems and Computer Telephony Integration (CTI)

systems.

鈥?/div>

1200 baud Bell 202 and ITU-T V.23 Frequency Shift Keying

(FSK) Demodulation

Stutter dial tone detection

Compliant with following specifications:

Bellcore GR-30-CORE & SR-TSV-002476

TIA/EIA-716, TIA/EIA-777 Draft

TIA/EIA PN-4195 Draft

British Telecom (BT) SIN227 & SIN242

ETSI ETS 300 778-1 and -2

Bellcore 鈥淐PE Alerting Signal (CAS)鈥? British Telecom 鈥淚dle State

and Loop State Tone Alert Signal鈥?and ETSI 鈥淒ual Tone Alerting

Signal (DT-AS)鈥?detection

Two seperate OP amps with adjustable gain for Tip/Ring and

Telephone Hybrid connections

Monitoring of the stop bit for framing error check

Serial FSK data interface with selectable output of bit stream or 1

byte buffer

FSK carrier detection

3 V or 5 V operation

Low power CMOS with intelligent powerdown mode

Operating temperature range: -40 擄C to +85 擄C

Packages available:

NW6006-XS 20 pin SOIC

(where 鈥榅鈥?is the revision ID)

FUNCTIONAL BLOCK DIAGRAM

OSCOUT

OSCIN

CB0

CB1

CB2

SDTEN

Oscillator

Bias

Generator

PWDN

GS1EN

SDTEN

Control Bit Decoder

FSKEN

PWDN

GS1EN

CASEN

MODE

GS2EN

VREF

Stutter Dial Tone

Detector

IN1+

IN1-

GS1

IN2+

IN2-

GS2

Guard Time

Tone Alert

Detector

CASEN

+

-

ST/GT

DR/STD

EST

CD/STRDT

DCLK

DATA

Mux

+

-

GS2EN

FSK

Demodulator

FSKEN

Data/Timing Recovery

MODE

Figure 1. Block Diagram

The IDT logo is a registered trademark of Integrated Device Technology, Inc

INDUSTRIAL TEMPERATURE RANGE

漏2002

Integrated Device Technology, Inc.

JULY 2002

DSC-6049/3

型號

版本

描述

廠商

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