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NTD60N02R-032 Datasheet

  • NTD60N02R-032

  • Power MOSFET 62 A, 24 V, N−Channel, DPAK

  • 85.25KB

  • 8頁

  • ONSEMI

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NTD60N02R
Power MOSFET
Features
62 A, 24 V, N鈭扖hannel, DPAK
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Planar HD3e Process for Fast Switching Performance
Low R
DS(on)
to Minimize Conduction Loss
Low C
iss
to Minimize Driver Loss
Low Gate Charge
Optimized for High Side Switching Requirements in
High鈭扙fficiency DC鈭扗C Converters
鈥?/div>
Pb鈭扚ree Packages are Available
MAXIMUM RATINGS
(T
J
= 25擄C unless otherwise noted)
Rating
Drain鈭抰o鈭扴ource Voltage
Gate鈭抰o鈭扴ource Voltage 鈭?Continuous
Thermal Resistance
Junction鈭抰o鈭扖ase
Total Power Dissipation @ T
C
= 25擄C
Drain Current
Continuous @ T
C
= 25擄C, Chip
Continuous @ T
C
= 25擄C, Limited by Package
Continuous @ T
A
= 25擄C, Limited by Wires
Thermal Resistance
Junction鈭抰o鈭扐mbient (Note 1)
Total Power Dissipation @ T
A
= 25擄C
Drain Current 鈭?Continuous @ T
A
= 25擄C
Thermal Resistance
Junction鈭抰o鈭扐mbient (Note 2)
Total Power Dissipation @ T
A
= 25擄C
Drain Current 鈭?Continuous @ T
A
= 25擄C
Operating and Storage Temperature
Single Pulse Drain鈭抰o鈭扴ource Avalanche Energy
鈭?Starting T
J
= 25擄C
(V
DD
= 50 Vdc, V
GS
= 10.0 Vdc,
I
L
= 11 Apk, L = 1.0 mH, R
G
= 25
W)
Maximum Lead Temperature for Soldering
Purposes, 1/8鈥?from case for 10 seconds
Symbol
V
DSS
V
GS
R
qJC
P
D
I
D
I
D
I
D
R
qJA
P
D
I
D
R
qJA
P
D
I
D
T
J
, and
T
stg
E
AS
Value
24
鹵20
2.6
58
62
50
32
80
1.87
10.5
120
1.25
8.5
鈭?5 to
175
60
Unit
Vdc
Vdc
G
擄C/W
W
A
A
A
4
C/W
W
A
擄C/W
W
A
擄C
mJ
1 2
3
1 2
3
4
S
4
http://onsemi.com
V
(BR)DSS
24 V
R
DS(on)
TYP
8.4 mW @ 10 V
I
D
MAX
62 A
N鈭扖hannel
D
1
2
3
CASE 369C
CASE 369AA
CASE 369D
DPAK
DPAK
DPAK
(Surface Mount) (Surface Mount) (Straight Lead)
STYLE 2
STYLE 2
STYLE 2
MARKING DIAGRAM
& PIN ASSIGNMENTS
4
Drain
YWW
T60
N02R
4
Drain
YWW
T60
N02R
1 2 3
Gate Drain Source
Publication Order Number:
NTD60N02R/D
T
L
260
擄C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. When surface mounted to an FR4 board using 0.5 in sq drain pad size.
2. When surface mounted to an FR4 board using the minimum recommended
pad size.
2
1
3
Drain
Gate
Source
Y
= Year
WW
= Work Week
60N02R = Device Code
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
Semiconductor Components Industries, LLC, 2004
1
December, 2004 鈭?Rev. 10

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