鈥?/div>
Pb鈭扚ree Packages are Available
Planar HD3e Process for Fast Switching Performance
Low R
DS(on)
to Minimize Conduction Loss
Low C
iss
to Minimize Driver Loss
Low Gate Charge
Optimized for High Side Switching Requirements in
High鈭扙fficiency DC鈭扗C Converters
http://onsemi.com
V
(BR)DSS
25 V
R
DS(on)
TYP
32 mW
I
D
MAX
23 A
N鈭扖HANNEL
D
MAXIMUM RATINGS
(T
J
= 25擄C unless otherwise specified)
Parameter
Drain鈭抰o鈭扴ource Voltage
Gate鈭抰o鈭扴ource Voltage 鈭?Continuous
Thermal Resistance, Junction鈭抰o鈭扖ase
Total Power Dissipation @ T
C
= 25擄C
Drain Current
鈭?Continuous @ T
C
= 25擄C, Chip
鈭?Continuous @ T
C
= 25擄C,
Limited by Package
鈭?Single Pulse
Thermal Resistance, Junction鈭抰o鈭扐mbient
(Note 1)
Total Power Dissipation @ T
A
= 25擄C
Drain Current 鈭?Continuous @ T
A
= 25擄C
Thermal Resistance, Junction鈭抰o鈭扐mbient
(Note 2)
Total Power Dissipation @ T
A
= 25擄C
Drain Current 鈭?Continuous @ T
A
= 25擄C
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering
Purposes, 1/8鈥?from case for 10 seconds
Symbol
V
DSS
V
GS
R
qJC
P
D
I
D
I
D
I
DM
R
qJA
P
D
I
D
R
qJA
P
D
I
D
T
J
, T
stg
T
L
Value
25
鹵20
5.6
22.3
23
17.1
40
76
1.64
4.5
110
1.14
3.8
鈭?5 to
150
260
Unit
Vdc
Vdc
擄C/W
W
A
A
A
擄C/W
W
A
擄C/W
W
A
擄C
擄C
1
4
DPAK鈭?
CASE 369D
(Straight Lead)
STYLE 2
1 2
3
4
DPAK
CASE 369AA
(Surface Mounted)
STYLE 2
G
S
MARKING
DIAGRAMS
4
Drain
AYWW
T23
N03
4
Drain
AYWW
T23
N03
1 2 3
Gate Drain Source
T23N03
A
Y
WW
= Device Code
= Assembly Location
= Year
= Work Week
2
1
3
Drain
Gate
Source
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits
are exceeded, device functional operation is not implied, damage may occur
and reliability may be affected.
1. When surface mounted to an FR4 board using 0.5 sq in pad size.
2. When surface mounted to an FR4 board using minimum recommended pad
size.
2
3
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
漏
Semiconductor Components Industries, LLC, 2004
1
August, 2004 鈭?Rev. 4
Publication Order Number:
NTD23N03R/D