音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

NSBMC290-16 Datasheet

  • NSBMC290-16

  • Burst Mode Memory Controller

  • 320.00KB

  • 20頁

  • NSC

掃碼查看芯片數(shù)據(jù)手冊

上傳產(chǎn)品規(guī)格書

PDF預(yù)覽

NSBMC290-16 -20 -25 -33 Burst Mode Memory Controller
July 1993
NSBMC290
TM
-16 -20 -25 -33
Burst Mode Memory Controller
General Description
The NSBMC290 is functionally equivalent to the
V29BMC
TM
The NSBMC290 Burst Mode Memory Control-
ler is a single chip device designed to simplify the imple-
mentation of burst mode access in high performance sys-
tems using the Am29000
TM
Streamlined Instruction Proces-
sor
The extremely high instruction rate achieved by this proces-
sor places extraordinary demands on memory system de-
signs if maximum throughput is to be sustained and costs
minimized
The most obvious solution to the problem of access speed
is to implement system memory using high-speed static
memories However the high cost and low density of these
devices make them an expensive and space consumptive
solution
A more cost effective method of solving this problem is via
the use of dynamic RAMs Their high density and low cost
make their use extremely attractive The impediment to their
use is their relatively slow access times
However when operated in page mode dynamic RAMs be-
have more like static memories Properly managed they
can yield access times approaching those of fully static
RAMs
The function of NSBMC290 is to interface the page mode
access protocol of dynamic RAMs with the more general
burst mode access protocol supported by the Am29000 lo-
cal channel The device manages a double banked arrang-
ment of dynamic RAMs such that when burst accesses are
permitted data can be read or written at the rate of one
word per system clock cycle
Packaged as a 124 pin PGA or 132 pin PQFP the
NSBMC290 drives memory arrays directly thus minimizing
design complexity and package count
Features
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Interfaces directly to Am29000 Local Channel
Manages Page Mode Dynamic Memory devices
Supports DRAMs from 64 KB to 16 MB
Manages Instruction and or Data Memory
Very Low Power Consumption
On-Chip Memory Address Multiplexer Drivers
Flexible Instruction Data Bus Buffer Management
Software-Configured operational parameters
Auto-Configured Bank Size and Location
High-Speed CMOS Technology
Block Diagram
Typical System Configuration
Logic Symbol
TL V 11803 鈥?2
TL V 11803 鈥?1
This document contains information concerning a product that has been developed by National Semiconductor Corporation V3 Corporation This information
is intended to help in evaluating this product National Semiconductor Corporation V3 Corporation reserves the right to change and improve the specifications
of this product without notice
TRI-STATE is a registered trademark National Semiconductor Corporation
NSBMC290
TM
is a trademark of National Semiconductor Corporation
V29BMC
TM
is a trademark of V3 Corporation
Am29000
TM
is a trademark of Advanced Micro Devices Sunnyvale California USA
C
1995 National Semiconductor Corporation
TL V 11803
RRD-B30M115 Printed in U S A

NSBMC290-16相關(guān)型號PDF文件下載

您可能感興趣的PDF文件資料

熱門IC型號推薦

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務(wù)：
賣家服務(wù)：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時間周一至周五
9:00-17:30

關(guān)注官方微信號，
第一時間獲取資訊。

建議反饋
返回頂部

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務(wù)的動力！意見一經(jīng)采納，將有感恩紅包奉上哦！