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NM27P040QE150 Datasheet

  • NM27P040QE150

  • 4,194,304-Bit (512K x 8) Processor Oriented CMOS EPROM

  • 10頁

  • NSC

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NM27P040 4 194 304-Bit (512K x 8) Processor Oriented CMOS EPROM
December 1993
NM27P040
4 194 304-Bit (512K x 8) Processor Oriented
CMOS EPROM
General Description
The NM27P040 is a 4096K Processor Oriented EPROM
(POP
TM
) configured as 512K x 8 It鈥檚 designed to simplify
microprocessor interfacing while remaining compatible with
standard EPROMs It can reduce both wait states and glue
logic when the specification improvements are taken advan-
tage of in the system design The NM27P040 is implement-
ed in National鈥檚 advanced CMOS EPROM process to pro-
vide a reliable solution and access times as fast as 120 ns
The interface improvements address two areas to eliminate
the need for additional devices to adapt the EPROM to the
microprocessor and to eliminate wait states at the termina-
tion of the access cycle Even with these improvements the
NM27P040 remains compatible with industry standard
JEDEC pinout EPROMs The time from CE or OE being
negated until the outputs are guaranteed to be in the high
impedance state has been reduced to eliminate the need
for wait states at the termination of the memory cycle and
the data-out hold time has been extended to eliminate the
need to provide data hold time for the microprocessor by
delaying control signals or latching and holding the data in
external latches
Features
Y
Y
Y
Y
Y
Fast output turn off to eliminate wait states
Extended data hold time for microprocessor
compatibility
High performance CMOS
120 ns access time
JEDEC standard pin configuration
Manufacturer鈥檚 identification code
Block Diagram
TL D 11367 鈥?1
TRI-STATE is a registered trademark of National Semiconductor Corporation
POP
TM
is a trademark of National Semiconductor Corporation
C
1995 National Semiconductor Corporation
TL D 11367
RRD-B30M105 Printed in U S A

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