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NM24C16 Datasheet

  • NM24C16

  • 16K-Bit Standard 2-Wire Bus Interface Serial EEPROM

  • 14頁(yè)

  • FAIRCHILD

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NM24C16/17 鈥?16K-Bit Standard 2-Wire Bus Interface Serial EEPROM
February 2000
NM24C16/17 鈥?16K-Bit Standard 2-Wire Bus
Interface Serial EEPROM
General Description
The NM24C16/17 devices are 16,384 bits of CMOS non-volatile
electrically erasable memory. These devices conform to all speci-
fications in the Standard IIC 2-wire protocol and are designed to
minimize device pin count, and simplify PC board layout require-
ments.
The upper half (upper 8Kbit) of the memory of the NM24C17 can be
write protected by connecting the WP pin to V
CC
. This section of
memory then becomes unalterable unless WP is switched to V
SS
.
This communications protocol uses CLOCK (SCL) and DATA
I/O (SDA) lines to synchronously clock data between the master
(for example a microprocessor) and the slave EEPROM device(s).
The Standard IIC protocol allows for a maximum of 16K of
EEPROM memory which is supported by the Fairchild family in
2K, 4K, 8K, and 16K devices, allowing the user to configure the
memory as the application requires with any combination of
EEPROMs. In order to implement higher EEPROM memory
densities on the IIC bus, the Extended IIC protocol must be used.
(Refer to the NM24C32 or NM24C65 datasheets for more infor-
mation.)
Fairchild EEPROMs are designed and tested for applications requir-
ing high endurance, high reliability and low power consumption.
Features
I
Extended operating voltage 2.7V 鈥?5.5V
I
400 KHz clock frequency (F) at 2.7V - 5.5V
I
200碌A(chǔ) active current typical
10碌A(chǔ) standby current typical
1碌A(chǔ) standby current typical (L)
0.1碌A(chǔ) standby current typical (LZ)
I
IIC compatible interface
鈥?Provides bi-directional data transfer protocol
I
Schmitt trigger inputs
I
Sixteen byte page write mode
鈥?Minimizes total write time per byte
I
Self timed write cycle
Typical write cycle time of 6ms
I
Hardware Write Protect for upper half (NM24C17 only)
I
Endurance: 1,000,000 data changes
I
Data retention greater than 40 years
I
Packages available: 8-pin DIP, 8-pin SO, and 8-pin TSSOP
I
Available in three temperature ranges
- Commercial: 0擄 to +70擄C
- Extended (E): -40擄 to +85C
- Automotive (V): -40擄 to +125擄C
Block Diagram
VCC
VSS
WP
H.V. GENERATION
TIMING &CONTROL
START
STOP
LOGIC
CONTROL
LOGIC
SLAVE ADDRESS
REGISTER
E2PROM
ARRAY
SDA
SCL
XDEC
WORD
ADDRESS
COUNTER
R/W
YDEC
CK
DIN
DATA REGISTER
DOUT
DS500072-1
漏 1998 Fairchild Semiconductor Corporation
NM24C16/17 Rev. G
1
www.fairchildsemi.com

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