鈥?/div>
On Resistance is 20
W
Typical at 5.0 V
Matching is < 1.0
W
Between Sections
2.0 to 6.0 V Operating Range
Ultra Low < 5.0 pC Charge Injection
Ultra Low Leakage < 1.0 nA at 5.0 V, 25 C
Wide Bandwidth > 200 MHz, 鈭?.0 dB
2000 V ESD (Human Body Model)
Ron Flatness
$6.0
W
at 5.0 V
US8 Package
Independent, Positive Enable
Pb鈭扚ree Package is Available*
MARKING
DIAGRAM
8
8
1
US8
US SUFFIX
CASE 493
A4
D
1
A4 = Device Code
D = Date Code
PIN ASSIGNMENT
1
2
3
NO1
1
8
V
CC
4
5
COM1
2
7
IN1
6
7
8
IN2
3
6
COM2
NO1
COM1
IN2
GND
NO2
COM2
IN1
V
CC
FUNCTION TABLE
GND
4
5
NO2
On/Off
Enable Input
L
H
State of
Analog Switch
Off
On
Figure 1. Pinout
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
*For additional information on our Pb鈭扚ree strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
漏
Semiconductor Components Industries, LLC, 2004
1
February, 2004 鈭?Rev. 6
Publication Order Number:
NLAS323/D