鈥?/div>
Pb鈭扚ree Package is Available
Designed for 1.65 V to 5.5 V V
CC
Operation
Unbuffered for Crystal Oscillator and Analog Applications
LVCMOS Compatible
Source/Sink
$16
mA @ 4.5 V V
CC
Near Zero Static Supply Current Substantially Reduces System
Power Requirements
鈥?/div>
Chip Complexity: FET = 72; Equivalent Gate = 18
MARKING
DIAGRAMS
SC鈭?8 / SOT鈭?63/SC鈭?0
DF SUFFIX
CASE 419B
M6
d
Pin 1
d = Date Code
IN A1
1
6
OUT Y1
TSOP鈭?/SOT鈭?3/SC鈭?9
DT SUFFIX
CASE 318G
M6
d
GND
2
5
V
CC
Pin 1
d = Date Code
IN A2
3
4
OUT Y2
PIN ASSIGNMENT
1
IN A1
GND
IN A2
OUT Y2
V
CC
OUT Y1
Figure 1. Pinout
(Top View)
2
3
4
5
IN A1
IN A2
1
1
OUT Y1
OUT Y2
6
ORDERING INFORMATION
Figure 2. Logic Symbol
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
FUNCTION TABLE
A Input
L
H
Y Output
H
L
漏
Semiconductor Components Industries, LLC, 2004
1
September, 2004 鈭?Rev. 3
Publication Order Number:
NL27WZU04/D
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