鈥?/div>
Extremely High Speed: t
PD
2.3 ns (typical) at V
CC
= 5.0 V
Designed for 1.65 V to 5.5 V V
CC
Operation, CMOS compatible
Over Voltage Tolerant Inputs
LVTTL Compatible 鈭?Interface Capability with 5.0 V TTL Logic
with V
CC
= 3.0 V
LVCMOS Compatible
24 mA Output Sink Capability
Near Zero Static Supply Current Substantially Reduces System
Power Requirements
Chip Complexity: FET = 72; Equivalent Gate = 18
Pb鈭扚ree Packages are Available
SC鈭?8
DF SUFFIX
CASE 419B
M7
d
Pin 1
d = Date Code
TSOP鈭?
DT SUFFIX
CASE 318G
Pin 1
M7
d
d = Date Code
PIN ASSIGNMENT
IN A1
1
6
OUT Y1
1
2
3
GND
2
5
V
CC
4
5
6
IN A2
3
4
OUT Y2
IN A1
GND
IN A2
OUT Y2
V
CC
OUT Y1
FUNCTION TABLE
A Input
Y Output
L
Z
Figure 1. Pinout
(Top View)
L
H
IN A1
IN A2
1
1
OUT Y1
OUT Y2
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
Figure 2. Logic Symbol
漏
Semiconductor Components Industries, LLC, 2004
1
April, 2004 鈭?Rev. 7
Publication Order Number:
NL27WZ07/D