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NIF5002NT3G Datasheet

  • NIF5002NT3G

  • Self−Protected FET with Temperature and Current Limit

  • 5頁

  • ONSEMI

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NIF5002N
Preferred Device
Self鈭扨rotected FET
with Temperature and
Current Limit
42 V, 2.0 A, Single N鈭扖hannel, SOT鈭?23
http://onsemi.com
HDPlust devices are an advanced series of power MOSFETs
which utilize ON Semiconductors latest MOSFET technology process
to achieve the lowest possible on鈭抮esistance per silicon area while
incorporating smart features. Integrated thermal and current limits
work together to provide short circuit protection. The devices feature
an integrated Drain鈭抰o鈭扜ate Clamp that enables them to withstand
high energy in the avalanche mode. The Clamp also provides
additional safety margin against unexpected voltage transients.
Electrostatic Discharge (ESD) protection is provided by an integrated
Gate鈭抰o鈭扴ource Clamp.
Features
V
(BR)DSS
(Clamped)
42 V
R
DS(ON)
TYP
165 mW @ 10 V
I
D
MAX
2.0 A*
*Max current limit value is dependent on input
condition.
Drain
Overvoltage
Protection
M
PWR
Gate
Input
R
G
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Current Limitation
Thermal Shutdown with Automatic Restart
Short Circuit Protection
I
DSS
Specified at Elevated Temperature
Avalanche Energy Specified
Slew Rate Control for Low Noise Switching
Overvoltage Clamped Protection
Pb鈭扚ree Packages are Available
ESD Protection
Temperature
Limit
Current
Limit
Current
Sense
Source
4
1
2
SOT鈭?23
CASE 318E
STYLE 3
Applications
鈥?/div>
Lighting
鈥?/div>
Solenoids
鈥?/div>
Small Motors
MAXIMUM RATINGS
(T
J
= 25擄C unless otherwise noted)
Rating
Drain鈭抰o鈭扴ource Voltage Internally Clamped
Drain鈭抰o鈭扜ate Voltage Internally Clamped
(R
G
= 1.0 MW)
Gate鈭抰o鈭扴ource Voltage
Continuous Drain Current
Power Dissipation
@ T
A
= 25擄C (Note 1)
@ T
A
= 25擄C (Note 2)
@ T
T
= 25擄C (Note 3)
Symbol
V
DSS
V
DGR
V
GS
I
D
P
D
Value
42
42
"14
1.1
1.7
8.9
鈭?5 to
150
150
Unit
V
V
V
3
MARKING DIAGRAM
1
GATE
AYW
5002N
G
G
2
DRAIN
3
SOURCE
4
DRAIN
Internally Limited
W
A
= Assembly Location
Y
= Year
W
= Work Week
5002N = Specific Device Code
G
= Pb鈭扚ree Package
(Note: Microdot may be in either location)
Operating Junction and Storage Temperature
Single Pulse Drain鈭抰o鈭扴ource Avalanche Energy
(V
DD
= 32 V, V
G
= 5.0 V, I
PK
= 1.0 A,
L = 300 mH, R
G(ext)
= 25
W)
T
J
, T
stg
E
AS
擄C
mJ
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
Preferred
devices are recommended choices for future use
and best overall value.
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
漏
Semiconductor Components Industries, LLC, 2006
1
April, 2006 鈭?Rev. 7
Publication Order Number:
NIF5002N/D

NIF5002NT3G 產(chǎn)品屬性

  • 4,000

  • 集成電路 (IC)

  • PMIC - MOSFET，電橋驅(qū)動器 - 內(nèi)部開關(guān)

  • HDPlus™

  • 低端

  • 非反相

  • 1

  • 165 毫歐

  • -

  • 2A

  • -

  • -55°C ~ 150°C

  • 表面貼裝

  • TO-261-4，TO-261AA

  • SOT-223

  • 帶卷 (TR)

  • NIF5002NT3G-NDNIF5002NT3GOSTR

NIF5002NT3G相關(guān)型號PDF文件下載

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  • 英文版
    Self-Protected FET with Temperature and Current Limit
    ONSEMI
  • 英文版
    Self-Protected FET with Temperature and Current Limit
    ONSEMI [ON...
  • 英文版
    Self−Protected FET with Temperature and Current Limit
    ONSEMI
  • 英文版
    Self−Protected FET with Temperature and Current Limit
    ONSEMI [ON Semi...
  • 英文版
    Self-Protected FET with Temperature and Current Limit
    ONSEMI
  • 英文版
    Self-Protected FET with Temperature and Current Limit
    ONSEMI [ON...
  • 英文版
    NIF5002N Self-Protected FET w/Temperature and Current Limit ...
    ON Semiconductor
  • 英文版
    Self-Protected FET with Temperature and Current Limit
    ONSEMI
  • 英文版
    Self-Protected FET with Temperature and Current Limit
    ONSEMI [ON...
  • 英文版
    Self-Protected FET with Temperature and Current Limit
    ONSEMI
  • 英文版
    Self-Protected FET with Temperature and Current Limit
    ONSEMI [ON...
  • 英文版
    Self-protected FET with Temperature and Current Limit 42 V, ...
    ON Semiconductor
  • 英文版
    Self−Protected FET with Temperature and Current Limit
    ONSEMI
  • 英文版
    Self−Protected FET with Temperature and Current Limit
    ONSEMI [ON Semi...
  • 英文版
    Self−Protected FET with Temperature and Current Limit
    ONSEMI
  • 英文版
    Self−Protected FET with Temperature and Current Limit
    ONSEMI [ON Semi...
  • 英文版
    Self−Protected FET with Temperature and Current Limit
    ONSEMI
  • 英文版
    Self−Protected FET with Temperature and Current Limit
    ONSEMI [ON Semi...
  • 英文版
    Self−Protected FET with Temperature and Current Limit
    ONSEMI
  • 英文版
    Self−Protected FET with Temperature and Current Limit
    ONSEMI [ON Semi...

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