鈥?/div>
Stress Applied to Load
Integrated ESD Diode Protection
New Design Increases Unclamped Inductive Switching (UIS) Energy
Per Area
Low Threshold Voltage to Interface Power Loads to Logic or
Microprocessor Devices
Low Saturation Voltage
High Pulsed Current Capability
Integrated Gate鈭扙mitter Resistor (R
GE
)
Emitter Ballasting for Short鈭扖ircuit Capability
Pb鈭扚ree Package is Available
G
R
GE
E
D
2
PAK
CASE 418B
STYLE 4
MARKING DIAGRAM
4
Collector
Unit
V
DC
V
DC
V
DC
A
DC
A
AC
kV
8.0
ESD
P
D
T
J
, T
stg
800
115
0.77
鈭?5 to +175
V
W
W/擄C
擄C
GB18N40B
A
Y
WW
G
1
Gate
2
Collector
3
Emitter
GB
18N40BG
AYWW
MAXIMUM RATINGS
(T
J
= 25擄C unless otherwise noted)
Rating
Collector鈭扙mitter Voltage
Collector鈭扜ate Voltage
Gate鈭扙mitter Voltage
Collector Current鈭扖ontinuous
@ T
C
= 25擄C 鈭?Pulsed
ESD (Human Body Model)
R = 1500
W,
C = 100 pF
ESD (Machine Model) R = 0
W,
C = 200 pF
Total Power Dissipation @ T
C
= 25擄C
Derate above 25擄C
Operating and Storage Temperature Range
Symbol
V
CES
V
CER
V
GE
I
C
ESD
Value
430
430
18
18
50
= Device Code
= Assembly Location
= Year
= Work Week
= Pb鈭扚ree Package
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
ORDERING INFORMATION
Device
NGB18N40CLBT4
NGB18N40CLBT4G
Package
D
2
PAK
Shipping
鈥?/div>
800/Tape & Reel
D
2
PAK
800/Tape & Reel
(Pb鈭扚ree)
鈥燜or information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
漏
Semiconductor Components Industries, LLC, 2006
1
May, 2006 鈭?Rev. 3
Publication Order Number:
NGB18N40CLB/D
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