May 1994
NDP510A / NDP510AE / NDP510B / NDP510BE
NDB510A / NDB510AE / NDB510B / NDB510BE
N-Channel Enhancement Mode Field Effect Transistor
General Description
These N-channel enhancement mode power field
effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This
very high density process has been especially
tailored to minimize on-state resistance, provide
superior switching performance, and withstand high
energy pulses in the avalanche and commutation
modes. These devices are particularly suited for low
voltage applications such as automotive, DC/DC
converters, PWM motor controls, and other battery
powered circuits where fast switching, low in-line
power loss, and resistance to transients are needed.
Features
15 and 13A, 100V. R
DS(ON)
= 0.12 and 0.15鈩?
Critical DC electrical parameters specified at
elevated temperature.
Rugged internal source-drain diode can eliminate
the need for an external Zener diode transient
suppressor.
175擄C maximum junction temperature rating.
High density cell design (3 million/in虜) for extremely
low R
DS(ON)
.
TO-220 and TO-263 (D
2
PAK) package for both
through hole and surface mount applications.
_____________________________________________________________________
D
G
S
Absolute Maximum Ratings
Symbol Parameter
V
DSS
V
DGR
V
GSS
I
D
P
D
Drain-Source Voltage
Drain-Gate Voltage (R
GS
< 1 M鈩?
Gate-Source Voltage - Continuous
- Nonrepetitive (t
P
< 50
碌s)
Drain Current - Continuous
- Pulsed
Total Power Dissipation @ T
C
= 25擄C
Derate above 25擄C
T
J
,T
STG
T
L
T
C
= 25擄C unless otherwise noted
NDP510A NDP510AE
NDB510A NDB510AE
100
100
鹵20
鹵40
15
60
75
0.5
NDP510B NDP510BE
NDB510B NDB510BE
Units
V
V
V
V
13
52
A
A
W
W/擄C
擄C
擄C
Operating and Storage Temperature Range
Maximum lead temperature for soldering
purposes, 1/8" from case for 5 seconds
-65 to 175
275
漏 1997 Fairchild Semiconductor Corporation
NDP510.SAM