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NBSG16VSBAR2 Datasheet

  • NBSG16VSBAR2

  • 2.5V/3.3V SiGe Differential Receiver/Driver with Variable Ou...

  • 193.16KB

  • 14頁

  • ONSEMI

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NBSG16VS
2.5V/3.3V SiGe Differential
Receiver/Driver with
Variable Output Swing
Description
1
QFN鈭?6
MN SUFFIX
CASE 485G
Features
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Maximum Input Clock Frequency up to 12 GHz Typical
Maximum Input Data Rate up to 12 Gb/s Typical
40 ps Typical Rise and Fall Times (V
CTRL
= V
CC
鈭?1 V)
120 ps Typical Propagation Delay (V
CTRL
= V
CC
鈭?1 V)
Variable Swing PECL Output with Operating Range: V
CC
= 2.375 V to
3.465 V with V
EE
= 0 V
Variable Swing NECL Output with NECL Inputs with
Operating Range: V
CC
= 0 V with V
EE
= 鈭?.375 V to 鈭?.465 V
Output Level (100 mV to 750 mV Peak鈭抰o鈭扨eak Output;
V
CC
鈭?V
EE
= 3.0 V to 3.465 V), Differential Output Only
50
W
Internal Input Termination Resistors
Compatible with Existing 2.5 V/3.3 V EP Devices
V
BB
and V
MM
Reference Voltage Output
Pb鈭扚ree Packages are Available
A
L
Y
W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb鈭扚ree Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 12 of this data sheet.
漏
Semiconductor Components Industries, LLC, 2006
1
July, 2006 鈭?Rev. 7
Publication Order Number:
NBSG16VS/D
脟脟
脟脟
The NBSG16VS is a differential receiver/driver targeted for high
frequency applications that require variable output swing. The device
is functionally equivalent to the EP16VS device with much higher
bandwidth and lower EMI capabilities. This device may be used for
applications driving VCSEL lasers.
Inputs incorporate internal 50
W
termination resistors and accept
NECL (Negative ECL), PECL (Positive ECL), LVTTL, LVCMOS,
CML, or LVDS. The output amplitude is varied by applying a voltage
to the V
CTRL
input pin. Outputs are variable swing ECL from 100 mV
to 750 mV amplitude, optimized for operation from V
CC
鈭?V
EE
=
3.0 V to 3.465 V.
The V
BB
and V
MM
pins are internally generated voltage supplies
available to this device only. The V
BB
is used as a reference voltage
for single鈭抏nded NECL or PECL inputs and the V
MM
pin is used as a
reference voltage for LVCMOS inputs. For single鈭抏nded input
operation, the unused complementary differential input is connected to
V
BB
or V
MM
as a switching reference voltage. V
BB
or V
MM
may also
rebias AC coupled inputs. When used, decouple V
BB
and V
MM
via a
0.01
mF
capacitor and limit current sourcing or sinking to 0.5 mA.
When not used, V
BB
and V
MM
outputs should be left open.
http://onsemi.com
MARKING DIAGRAMS*
SG
11
ALYW
FCBGA鈭?6
BA SUFFIX
CASE 489
16
SG
16VS
ALYWG
G

NBSG16VSBAR2 產(chǎn)品屬性

  • 100

  • 集成電路 (IC)

  • 專用 IC

  • -

  • 收發(fā)器

  • 儀表

  • 表面貼裝

  • 16-LBGA，F(xiàn)CBGA

  • 16-FCBGA（4x4）

  • 帶卷 (TR)

  • NBSG16VSBAR2OSTR

NBSG16VSBAR2相關(guān)型號(hào)PDF文件下載

  • 型號(hào)
    版本
    描述
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  • 英文版
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    ONSEMI [ON...
  • 英文版
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    ON Semiconductor

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