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NBSG14BAR2 Datasheet

  • NBSG14BAR2

  • 2.5V/3.3V SiGe Differential 1:4 Clock/Data Driver with RSECL...

  • 13頁

  • ONSEMI

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NBSG14
2.5V/3.3V SiGe Differential
1:4 Clock/Data Driver with
RSECL* Outputs
*Reduced Swing ECL
http://onsemi.com
Description
MARKING DIAGRAMS*
The NBSG14 is a 1鈭抰o鈭? clock/data distribution chip, optimized for
ultra鈭抣ow skew and jitter.
Inputs incorporate internal 50
W
termination resistors and accept
NECL (Negative ECL), PECL (Positive ECL), LVTTL, LVCMOS,
CML, or LVDS. Outputs are RSECL (Reduced Swing ECL), 400 mV.
Features
SG
14
ALYW
FCBGA鈭?6
BA SUFFIX
CASE 489
16
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
QFN鈭?6
MN SUFFIX
CASE 485G
A
L
Y
W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb鈭扚ree Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
漏
Semiconductor Components Industries, LLC, 2006
1
July, 2006 鈭?Rev. 9
Publication Order Number:
NBSG14/D
脟脟脟
脟脟脟
1
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Maximum Input Clock Frequency up to 12 GHz Typical
Maximum Input Data Rate up to 12 Gb/s Typical
30 ps Typical Rise and Fall Times
125 ps Typical Propagation Delay
RSPECL Output with Operating Range: V
CC
= 2.375 V to 3.465 V
with V
EE
= 0 V
RSNECL Output with RSNECL or NECL Inputs with
Operating Range: V
CC
= 0 V with V
EE
= 鈭?.375 V to 鈭?.465 V
RSECL Output Level (400 mV Peak鈭抰o鈭扨eak Output),
Differential Output
50
W
Internal Input Termination Resistors
Compatible with Existing 2.5 V/3.3 V LVEP, EP, and LVEL Devices
Pb鈭扚ree Packages are Available
SG14
ALYWG
G

NBSG14BAR2 產(chǎn)品屬性

  • 100

  • 集成電路 (IC)

  • 時鐘/計(jì)時 - 時鐘緩沖器，驅(qū)動器

  • -

  • 扇出緩沖器（分配），數(shù)據(jù)

  • 1

  • 1:4

  • 是/是

  • CML，LVCMOS，LVDS，LVTTL，NECL，PECL，RSECL

  • RSECL，RSNECL，RSPECL

  • 12GHz

  • 2.375 V ~ 3.465 V

  • -40°C ~ 70°C

  • 表面貼裝

  • 16-LBGA，F(xiàn)CBGA

  • 16-FCBGA（4x4）

  • 帶卷 (TR)

  • NBSG14BAR2OSTR

NBSG14BAR2相關(guān)型號PDF文件下載

  • 型號
    版本
    描述
    廠商
    下載
  • 英文版
    2.5V/3.3VSiGe 1:2 Differential Clock Driver with RSECL* Out...
    ONSEMI
  • 英文版
    2.5V/3.3VSiGe 1:2 Differential Clock Driver with RSECL* Out...
    ONSEMI [ON...
  • 英文版
    2.5V/3.3V SiGe Differential 1:4 Clock/Data Driver with RSECL...
    ONSEMI
  • 英文版
    2.5V/3.3V SiGe Differential 1:4 Clock/Data Driver with RSECL...
    ONSEMI [ON...
  • 英文版
    2.5V/3.3V SiGe Differential Receiver/Driver with RSECLOutput...
    ONSEMI
  • 英文版
    2.5V/3.3V SiGe Differential Receiver/Driver with RSECLOutput...
    ONSEMI [ON...
  • 英文版
    2.5V/3.3VSiGe Differential 1:10 Clock/Data Driver with RSEC...
  • 英文版
    2.5V/3.3VMultilevel Input to CML Clock/Data Receiver/Drive...
    ONSEMI
  • 英文版
    2.5V/3.3VMultilevel Input to CML Clock/Data Receiver/Drive...
    ONSEMI [ON...
  • 英文版
    2.5V/3.3V SiGe Selectable Differential Clock and Data D Flip...
    ONSEMI
  • 英文版
    2.5V/3.3V SiGe Selectable Differential Clock and Data D Flip...
    ONSEMI [ON...
  • 英文版
    2.5V/3.3VSiGe Differential 2 X 2 Crosspoint Switch with Out...
    ONSEMI
  • 英文版
    2.5V/3.3VSiGe Differential 2 X 2 Crosspoint Switch with Out...
    ONSEMI [ON...
  • 英文版
    Evaluation Board Manual
    ONSEMI
  • 英文版
    Evaluation Board Manual
    ONSEMI [ON...
  • 英文版
    2.5V/3.3VSiGe Differential Smart Gate with Output Level Sel...
    ONSEMI [ON...
  • 英文版
    2.5V/3.3V SiGe 1:2 Differential Clock Driver with RSECL Outp...
    ONSEMI
  • 英文版
    2.5V/3.3VSiGe 1:2 Differential Clock Driver with RSECL* Out...
    ONSEMI
  • 英文版
    2.5V/3.3VSiGe 1:2 Differential Clock Driver with RSECL* Out...
    ONSEMI [ON...
  • 英文版
    2.5V/3.3V SiGe 1:2 Differential Clock Driver with RSECL Outp...
    ON Semiconductor

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