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NB6L239MNR2 Datasheet

  • NB6L239MNR2

  • 2.5 V / 3.3 V Any Differential Clock IN to Differential LVPE...

  • 93.79KB

  • 12頁

  • ONSEMI

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NB6L239
2.5 V / 3.3 V Any Differential
Clock IN to Differential
LVPECL OUT
梅1/2/4/8,
梅2/4/8/16
Clock Divider
Features
http://onsemi.com
The NB6L239 is a high鈭抯peed, low skew clock divider with two
divider circuits, each having selectable clock divide ratios;
B1/2/4/8
and
B2/4/8/16.
Both divider circuits drive a pair of differential
LVPECL outputs. (More device information on page 7).
鈥?/div>
Maximum Clock Input Frequency, 3.0 GHz
鈥?/div>
Input Compatibility with LVDS/LVPECL/CML/HSTL
鈥?/div>
Rise/Fall Time 70 ps Typical
鈥?/div>
< 10 ps Typical Output鈭抰o鈭扥utput Skew
鈥?/div>
Ex. 622 MHz Input Generates 38.8 MHz to 622 MHz Outputs
鈥?/div>
Internal 50
W
Termination Provided
鈥?/div>
Random Clock Jitter < 1 ps RMS
鈥?/div>
Divide鈭抌y鈭? Edge of QA Aligned to QB Divided Output
鈥?/div>
Operating Range: V
CC
= 2.375 V to 3.465 V with V
EE
= 0 V
鈥?/div>
Master Reset for Synchronization of Multiple Chips
鈥?/div>
V
BBAC
Reference Output
鈥?/div>
Synchronous Output Enable/Disable
MARKING DIAGRAM*
Bottom View
QFN鈭?6
MN SUFFIX
CASE 485G
XXXX
A
L
Y
W
XXXX
XXXX
ALYW
= Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
SELA0
SELA1
QA
QA
CLK
VT
CLK
QB
QB
EN
SELB0
SELB1
MR
+
Figure 1. Simplified Logic Diagram
Semiconductor Components Industries, LLC, 2004
1
April, 2004 鈭?Rev. 0
Publication Order Number:
NB6L239/D

NB6L239MNR2 產(chǎn)品屬性

  • 3,000

  • 集成電路 (IC)

  • 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器,PLL,頻率合成器

  • ECLinPS MAX™

  • 時(shí)鐘除法器

  • CML,HSTL,LVDS,LVPECL

  • LVPECL

  • 1

  • 1:2

  • 是/是

  • 3GHz

  • 是/無

  • 2.375 V ~ 3.465 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 16-VFQFN 裸露焊盤

  • 16-QFN(3x3)

  • 帶卷 (TR)

NB6L239MNR2相關(guān)型號PDF文件下載

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    描述
    廠商
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  • 英文版
    2.5V / 3.3V MULTILEVEL INPUT TO DIFFERENTIAL LVPECL/LVNECL 1...
    ONSEMI
  • 英文版
    2.5V / 3.3V MULTILEVEL INPUT TO DIFFERENTIAL LVPECL/LVNECL 1...
    ONSEMI [ON...
  • 英文版
    2.5 V/3.3 V 3.0 GHz Differential 1:4 LVPECL Fanout Buffer
    ONSEMI
  • 英文版
    2.5 V/3.3 V 3.0 GHz Differential 1:4 LVPECL Fanout Buffer
    ONSEMI [ON Semi...
  • 英文版
    2.5V / 3.3V Multilevel Input to Differential LVPECL/LVNECL C...
    ONSEMI
  • 英文版
    2.5V / 3.3V Multilevel Input to Differential LVPECL/LVNECL C...
    ONSEMI [ON...
  • 英文版
    2.5V / 3.3V Differential 2 X 2 Crosspoint Switch with LVPECL...
    ONSEMI
  • 英文版
    2.5V / 3.3V Differential 2 X 2 Crosspoint Switch with LVPECL...
    ONSEMI [ON Semi...
  • 英文版
    2.5V / 3.3V MULTILEVEL INPUT TO DIFFERENTIAL LVPECL/LVNECL 1...
    ONSEMI
  • 英文版
    2.5V / 3.3V MULTILEVEL INPUT TO DIFFERENTIAL LVPECL/LVNECL 1...
    ONSEMI [ON...
  • 英文版
    2.5V / 3.3V 1:2 Differential CML Fanout Buffer
    ONSEMI [ON Semi...
  • 英文版
    2.5 V 1:2 AnyLevel TM Input to LVDS Fanout Buffer / Translat...
    ONSEMI [ON Semi...
  • 英文版
    2.5 V/3.3 V 3.0 GHz Differential 1:4 CML Fanout Buffer
    ONSEMI
  • 英文版
    2.5 V/3.3 V 3.0 GHz Differential 1:4 CML Fanout Buffer
    ONSEMI [ON Semi...
  • 英文版
    2.5 V 1:4 AnyLevel?? Differential Input to LVDS Fanout Buffe...
    ONSEMI [ON Semi...
  • 英文版
    2.5V / 3.3V Multilevel Input to Differential LVPECL/LVNECL C...
    ONSEMI
  • 英文版
    2.5V / 3.3V Multilevel Input to Differential LVPECL/LVNECL C...
    ONSEMI [ON...
  • 英文版
    2.5 V / 3.3 V Any Differential Clock IN to Differential LVPE...
    ONSEMI
  • 英文版
    2.5 V / 3.3 V Any Differential Clock IN to Differential LVPE...
    ONSEMI [ON...
  • 英文版
    2.5V / 3.3V 1:2 Differential LVPECL Clock / Data Fanout Buff...
    ONSEMI

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