NB6L16
2.5V / 3.3V Multilevel Input to
Differential LVPECL/LVNECL
Clock or Data Receiver/
Driver/Translator Buffer
The NB6L16 is a high precision, low power ECL differential clock
or data receiver/driver/translator buffer. The device is functionally
equivalent to the EL16, EP16, LVEL16 and NBSG16 devices. With
output transition times of 70 ps, it is ideally suited for high frequency,
low power systems. The device is targeted for Backplane buffering,
GbE clock/data distribution, Fibre Channel distribution and SONET
clock/data distribution applications.
Input accept LVNECL (Negative ECL), LVPECL (Positive ECL),
LVTTL, LVCMOS, CML, or LVDS. Outputs are 800 mV
ECL signals.
The V
BB
pin, an internally generated voltage supply, is available to
this device only. For single鈭抏nded input conditions, the unused
differential input is connected to V
BB
as a switching reference voltage.
V
BB
may also rebias AC coupled inputs. When used, decouple V
BB
and V
CC
via a 0.01 mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, V
BB
should be left open.
Features
http://onsemi.com
MARKING
DIAGRAMS*
8
1
SOIC鈭?
D SUFFIX
CASE 751
1
8
6L16
ALYW
G
8
1
TSSOP鈭?
DT SUFFIX
CASE 948R
A
L
Y
W
G
8
6L16
ALYWG
G
1
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb鈭扚ree Package
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Maximum Input Clock Frequency
w
6 GHz Typical
Maximum Input Data Rate Frequency
w
6 Gb/s Typical
Low 12 mA Typical Power Supply Current
70 ps Typical Rise/Fall Times
130 ps Input Propagation Delay
On鈭扖hip Reference for ECL Single鈭扙nded Input 鈭?V
BB
Output
PECL Mode Operating Range:
V
CC
= 2.375 V to 3.465 V with V
EE
= 0 V
NECL Mode Operating Range:
V
CC
= 0 V with V
EE
= 鈭?.375 V to 鈭?.465 V
Open Input Default State
LVDS, LVPECL, LVNECL, LVCMOS, LVTTL and CML Input
Compatible
Pb鈭扚ree Packages are Available
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
漏
Semiconductor Components Industries, LLC, 2007
1
March, 2007 鈭?Rev. 6
Publication Order Number:
NB6L16/D
next
NB6L16相關(guān)型號(hào)PDF文件下載
-
型號(hào)
版本
描述
廠商
下載
-
英文版
2.5V / 3.3V MULTILEVEL INPUT TO DIFFERENTIAL LVPECL/LVNECL 1...
ONSEMI
-
英文版
2.5V / 3.3V MULTILEVEL INPUT TO DIFFERENTIAL LVPECL/LVNECL 1...
ONSEMI [ON...
-
英文版
2.5 V/3.3 V 3.0 GHz Differential 1:4 LVPECL Fanout Buffer
ONSEMI
-
英文版
2.5 V/3.3 V 3.0 GHz Differential 1:4 LVPECL Fanout Buffer
ONSEMI [ON Semi...
-
英文版
2.5V / 3.3V Multilevel Input to Differential LVPECL/LVNECL C...
ONSEMI
-
英文版
2.5V / 3.3V Multilevel Input to Differential LVPECL/LVNECL C...
ONSEMI [ON...
-
英文版
2.5V / 3.3V Differential 2 X 2 Crosspoint Switch with LVPECL...
ONSEMI
-
英文版
2.5V / 3.3V Differential 2 X 2 Crosspoint Switch with LVPECL...
ONSEMI [ON Semi...
-
英文版
2.5V / 3.3V MULTILEVEL INPUT TO DIFFERENTIAL LVPECL/LVNECL 1...
ONSEMI
-
英文版
2.5V / 3.3V MULTILEVEL INPUT TO DIFFERENTIAL LVPECL/LVNECL 1...
ONSEMI [ON...
-
英文版
2.5V / 3.3V 1:2 Differential CML Fanout Buffer
ONSEMI [ON Semi...
-
英文版
2.5 V 1:2 AnyLevel TM Input to LVDS Fanout Buffer / Translat...
ONSEMI [ON Semi...
-
英文版
2.5 V/3.3 V 3.0 GHz Differential 1:4 CML Fanout Buffer
ONSEMI
-
英文版
2.5 V/3.3 V 3.0 GHz Differential 1:4 CML Fanout Buffer
ONSEMI [ON Semi...
-
英文版
2.5 V 1:4 AnyLevel?? Differential Input to LVDS Fanout Buffe...
ONSEMI [ON Semi...
-
英文版
2.5V / 3.3V Multilevel Input to Differential LVPECL/LVNECL C...
ONSEMI
-
英文版
2.5V / 3.3V Multilevel Input to Differential LVPECL/LVNECL C...
ONSEMI [ON...
-
英文版
2.5 V / 3.3 V Any Differential Clock IN to Differential LVPE...
ONSEMI
-
英文版
2.5 V / 3.3 V Any Differential Clock IN to Differential LVPE...
ONSEMI [ON...
-
英文版
2.5V / 3.3V 1:2 Differential LVPECL Clock / Data Fanout Buff...
ONSEMI