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NB6L14MNR2G Datasheet

  • NB6L14MNR2G

  • 2.5 V/3.3 V 3.0 GHz Differential 1:4 LVPECL Fanout Buffer

  • 10頁(yè)

  • ONSEMI

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NB6L14
2.5 V/3.3 V 3.0 GHz
Differential 1:4 LVPECL
Fanout Buffer
Multi鈭扡evel Inputs with Internal Termination
Description
http://onsemi.com
MARKING
DIAGRAM*
1
QFN鈭?6
MN SUFFIX
CASE 485G
16
NB6L
14
ALYWG
G
The NB6L14 is a 3.0 GHz differential 1:4 LVPECL fanout buffer.
The differential inputs incorporate internal 50
W
termination resistors
that are accessed through the VT pin. This feature allows the NB6L14
to accept various logic standards, such as LVPECL, LVCMOS,
LVTTL, CML, or LVDS logic levels. The VREF_AC reference output
can be used to rebias capacitor鈭抍oupled differential or single鈭抏nded
input signals. The 1:4 fanout design was optimized for low output
skew applications.
The NB6L14 is a member of the ECLinPS MAX鈩?family of high
performance clock and data products.
Features
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Maximum Input Clock Frequency > 2.5 GHz, Typical
< 20 ps Within Device Output Skew
330 ps Typical Propagation Delay
145 ps Typical Rise and Fall Times
Differential LVPECL Outputs, 720 mV Amplitude, Typical
LVPECL Mode Operating Range: V
CC
= 2.375 V to 3.63 V with
GND = 0 V
Internal 50
W
Input Termination Resistors Provided
VREF_AC Reference Output Voltage
鈭?0擄C
to +85擄C Ambient Operating Temperature
Available in 3 mm x 3 mm 16 Pin QFN
These are Pb鈭扚ree Devices
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb鈭扚ree Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
D
Q
Figure 1. Simplified Logic Diagram
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
漏
Semiconductor Components Industries, LLC, 2006
December, 2006
鈭?/div>
Rev. 0
1
Publication Order Number:
NB6L14/D

NB6L14MNR2G 產(chǎn)品屬性

  • 3,000

  • 集成電路 (IC)

  • 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘緩沖器，驅(qū)動(dòng)器

  • ECLinPS MAX™

  • 扇出緩沖器（分配）

  • 1

  • 1:4

  • 是/是

  • CML，LVCMOS，LVDS，LVPECL，LVTTL

  • LVCMOS，LVPECL

  • 3GHz

  • 2.375 V ~ 3.63 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 16-VFQFN 裸露焊盤

  • 16-QFN（3x3）

  • 帶卷 (TR)

  • NB6L14MNR2G-NDNB6L14MNR2GOSTR

NB6L14MNR2G相關(guān)型號(hào)PDF文件下載

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  • 英文版
    2.5V / 3.3V MULTILEVEL INPUT TO DIFFERENTIAL LVPECL/LVNECL 1...
    ONSEMI
  • 英文版
    2.5V / 3.3V MULTILEVEL INPUT TO DIFFERENTIAL LVPECL/LVNECL 1...
    ONSEMI [ON...
  • 英文版
    2.5 V/3.3 V 3.0 GHz Differential 1:4 LVPECL Fanout Buffer
    ONSEMI
  • 英文版
    2.5 V/3.3 V 3.0 GHz Differential 1:4 LVPECL Fanout Buffer
    ONSEMI [ON Semi...
  • 英文版
    2.5V / 3.3V Multilevel Input to Differential LVPECL/LVNECL C...
    ONSEMI
  • 英文版
    2.5V / 3.3V Multilevel Input to Differential LVPECL/LVNECL C...
    ONSEMI [ON...
  • 英文版
    2.5V / 3.3V Differential 2 X 2 Crosspoint Switch with LVPECL...
    ONSEMI
  • 英文版
    2.5V / 3.3V Differential 2 X 2 Crosspoint Switch with LVPECL...
    ONSEMI [ON Semi...
  • 英文版
    2.5V / 3.3V MULTILEVEL INPUT TO DIFFERENTIAL LVPECL/LVNECL 1...
    ONSEMI
  • 英文版
    2.5V / 3.3V MULTILEVEL INPUT TO DIFFERENTIAL LVPECL/LVNECL 1...
    ONSEMI [ON...
  • 英文版
    2.5V / 3.3V 1:2 Differential CML Fanout Buffer
    ONSEMI [ON Semi...
  • 英文版
    2.5 V 1:2 AnyLevel TM Input to LVDS Fanout Buffer / Translat...
    ONSEMI [ON Semi...
  • 英文版
    2.5 V/3.3 V 3.0 GHz Differential 1:4 CML Fanout Buffer
    ONSEMI
  • 英文版
    2.5 V/3.3 V 3.0 GHz Differential 1:4 CML Fanout Buffer
    ONSEMI [ON Semi...
  • 英文版
    2.5 V 1:4 AnyLevel?? Differential Input to LVDS Fanout Buffe...
    ONSEMI [ON Semi...
  • 英文版
    2.5V / 3.3V Multilevel Input to Differential LVPECL/LVNECL C...
    ONSEMI
  • 英文版
    2.5V / 3.3V Multilevel Input to Differential LVPECL/LVNECL C...
    ONSEMI [ON...
  • 英文版
    2.5 V / 3.3 V Any Differential Clock IN to Differential LVPE...
    ONSEMI
  • 英文版
    2.5 V / 3.3 V Any Differential Clock IN to Differential LVPE...
    ONSEMI [ON...
  • 英文版
    2.5V / 3.3V 1:2 Differential LVPECL Clock / Data Fanout Buff...
    ONSEMI

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