NB6L11
2.5V/3.3V Multilevel Input to
Differential LVPECL/LVNECL
1:2 Clock or Data
Fanout Buffer/Translator
The NB6L11 is an enhanced differential 1:2 clock or data fanout
buffer/translator. The device has the same pinout and is functionally
equivalent to the LVEL11, EP11, LVEP11 devices. Moreover, the
device is optimized for the systems that require LOW skew, LOW
jitter and LOW power consumption.
Differential input can be configured to accept single鈭抏nded signal
by applying an external reference voltage to unused complimentary
input pin. Input accept LVNECL, LVPECL, LVTTL, LVCMOS,
CML, or LVDS. The outputs are 800 mV ECL signals.
鈥?/div>
Maximum Input Clock Frequency
w
6 GHz Typical
鈥?/div>
Maximum Input Data Rate
w
6 Gb/s Typical
鈥?/div>
Low 14 mA Typical Power Supply Current
鈥?/div>
150 ps Typical Propagation Delay
鈥?/div>
5 ps Typical Within Device Skew
鈥?/div>
75 ps Typical Rise/Fall Times
鈥?/div>
PECL Mode Operating Range: V
CC
= 2.375 V to 3.465 V
with V
EE
= 0 V
鈥?/div>
NECL Mode Operating Range: V
CC
= 0 V
with V
EE
= 鈭?.375 V to 鈭?.465 V
鈥?/div>
Open Input Default State
http://onsemi.com
MARKING DIAGRAMS*
8
8
1
SO鈭?
D SUFFIX
CASE 751
6L11
ALYW
1
8
8
1
TSSOP鈭?
DT SUFFIX
CASE 948R
A
L
Y
W
= Assembly Location
= Wafer Lot
= Year
= Work Week
6L11
ALYW
1
鈥?/div>
Q Outputs Will Default LOW with Inputs Open or at V
EE
鈥?/div>
LVDS, LVPECL, LVNECL, LCMOS, LVTTL and CML Input
Compatible
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
Device
NB6L11D
NB6L11DR2
NB6L11DT**
NB6L11DTR2**
Package
SO鈭?
SO鈭?
TSSOP鈭?
TSSOP鈭?
Shipping
鈥?/div>
98 Units/Rail
2500/
Tape & Reel
100 Units/Rail
2500/
Tape & Reel
鈥燜or information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
**Future Product 鈭?Contact factory for availability.
錚?/div>
Semiconductor Components Industries, LLC, 2004
1
April, 2004 鈭?Rev. 2
Publication Order Number:
NB6L11/D
NB6L11D 產(chǎn)品屬性
ON Semiconductor
時(shí)鐘緩沖器
4
6000 MHz
0.2 ns
+/- 3.465 V
+/- 2.375 V
+ 85 C
- 40 C
SOIC-8 Narrow
Tube
SMD/SMT
98
NB6L11D相關(guān)型號(hào)PDF文件下載
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型號(hào)
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描述
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英文版
2.5V / 3.3V MULTILEVEL INPUT TO DIFFERENTIAL LVPECL/LVNECL 1...
ONSEMI
-
英文版
2.5V / 3.3V MULTILEVEL INPUT TO DIFFERENTIAL LVPECL/LVNECL 1...
ONSEMI [ON...
-
英文版
2.5 V/3.3 V 3.0 GHz Differential 1:4 LVPECL Fanout Buffer
ONSEMI
-
英文版
2.5 V/3.3 V 3.0 GHz Differential 1:4 LVPECL Fanout Buffer
ONSEMI [ON Semi...
-
英文版
2.5V / 3.3V Multilevel Input to Differential LVPECL/LVNECL C...
ONSEMI
-
英文版
2.5V / 3.3V Multilevel Input to Differential LVPECL/LVNECL C...
ONSEMI [ON...
-
英文版
2.5V / 3.3V Differential 2 X 2 Crosspoint Switch with LVPECL...
ONSEMI
-
英文版
2.5V / 3.3V Differential 2 X 2 Crosspoint Switch with LVPECL...
ONSEMI [ON Semi...
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英文版
2.5V / 3.3V MULTILEVEL INPUT TO DIFFERENTIAL LVPECL/LVNECL 1...
ONSEMI
-
英文版
2.5V / 3.3V MULTILEVEL INPUT TO DIFFERENTIAL LVPECL/LVNECL 1...
ONSEMI [ON...
-
英文版
2.5V / 3.3V 1:2 Differential CML Fanout Buffer
ONSEMI [ON Semi...
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英文版
2.5 V 1:2 AnyLevel TM Input to LVDS Fanout Buffer / Translat...
ONSEMI [ON Semi...
-
英文版
2.5 V/3.3 V 3.0 GHz Differential 1:4 CML Fanout Buffer
ONSEMI
-
英文版
2.5 V/3.3 V 3.0 GHz Differential 1:4 CML Fanout Buffer
ONSEMI [ON Semi...
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英文版
2.5 V 1:4 AnyLevel?? Differential Input to LVDS Fanout Buffe...
ONSEMI [ON Semi...
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英文版
2.5V / 3.3V Multilevel Input to Differential LVPECL/LVNECL C...
ONSEMI
-
英文版
2.5V / 3.3V Multilevel Input to Differential LVPECL/LVNECL C...
ONSEMI [ON...
-
英文版
2.5 V / 3.3 V Any Differential Clock IN to Differential LVPE...
ONSEMI
-
英文版
2.5 V / 3.3 V Any Differential Clock IN to Differential LVPE...
ONSEMI [ON...
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英文版
2.5V / 3.3V 1:2 Differential LVPECL Clock / Data Fanout Buff...
ONSEMI
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