鈥?/div>
Maximum Input Clock Frequency
w
6 GHz Typical
Maximum Input Data Rate
w
6 Gb/s Typical
Low 14 mA Typical Power Supply Current
150 ps Typical Propagation Delay
5 ps Typical Within Device Skew
75 ps Typical Rise/Fall Times
PECL Mode Operating Range:
V
CC
= 2.375 V to 3.465 V with V
EE
= 0 V
NECL Mode Op rating Range:
V
CC
= 0 V with V
EE
=
鈭?.375
V to
鈭?.465
V
Open Input Default State
Q Outputs Will Default LOW with Inputs Open or at V
EE
LVDS, LVPECL, LVNECL, LCMOS, LVTTL and CML Input
Compatible
Pb鈭扚ree Packages are Available
8
1
TSSOP鈭?
DT SUFFIX
CASE 948R
8
6L11
ALYW
G
G
1
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb鈭扚ree Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
漏
Semiconductor Components Industries, LLC, 2006
November, 2006
鈭?/div>
Rev. 6
1
Publication Order Number:
NB6L11/D
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