NB3N3001
3.3 V 106.25 MHz/ 212.5 MHz
PureEdge Clock Generator with
LVPECL Differential Output
Description
The NB3N3001 is a low鈭抝itter, dual鈭抮ate PLL鈭抯ynthesized clock
generator. It accepts a standard 26.5625 MHz fundamental mode AT cut
parallel resonant crystal as the reference source for its integrated crystal
oscillator and low noise phase鈭抣ocked loop (PLL) and produces user
selectable clock frequencies of either 106.25 MHz or 212.5 MHz.
In addition, the PLL circuitry will generate a 50% duty cycle
square鈭抴ave through a pair of differential LVPECL clock outputs.
Typical phase jitter at 106.25 MHz is 0.3 ps RMS from 637 kHz to
10 MHz.
The LVPECL output drivers can be disabled to high impedance with
the OE pin set LOW. The NB3N3001 operates from a single +3.3 V
supply, and is available in both plastic package and die form. The
operating temperature range is from 鈭?0擄C to +85擄C.
The NB3N3001 device provides the optimum combination of low
cost, flexibility, and high performance which makes it ideal for
Fibre鈭扖hannel applications.
Features
http://onsemi.com
MARKING
DIAGRAM
301
YWW
AG
TSSOP鈭?
DT SUFFIX
CASE 948S
A
Y
WW
G
= Assembly Location
= Year
= Work Week
= Pb鈭扚ree Package
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PureEdge Clock Family Provides Accuracy and Precision
Selectable Output Frequency of 106.25 MHz or 212.5 MHz
Crystal Oscillator Interface Designed for a 26.5625 MHz Crystal
Fully Integrated Phase鈭扡ock鈭扡oop with Internal Loop Filter
Differential 3.3 V LVPECL Outputs
Exceeds Bellcore and ITU Jitter Generation Specification
RMS Phase Jitter @ 106.25 MHz, using a 26.5625 MHz Crystal
(637 kHz 鈭?10 MHz): 0.3 ps (Typical)
RMS Phase Noise at 106.25 MHz
Phase Noise:
Offset Noise Power
100 Hz 鈭?08 dBc/Hz
1 kHz 鈭?22 dBc/Hz
10 kHz 鈭?35 dBc/Hz
100 kHz 鈭?35 dBc/Hz
Operating Range: V
CC
= 3.135 V to 3.465 V
鈭?0擄C to +85擄C Ambient Operating Temperature
Small Footprint 8鈭抪in TSSOP Package
This is a Pb鈭扚ree Device
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
FSEL
X
IN
26.5625 MHz
X
OUT
M =
B32
Crystal
Oscillator
Phase
Detector
Charge
Pump
VCO
850 MHz
N =B8
orB4
LVPECL
Output
Q
212.5 MHz
or
Q 106.25 MHz
Figure 1. Logic Diagram
漏
Semiconductor Components Industries, LLC, 2006
1
October, 2006 鈭?Rev. 1
Publication Order Number:
NB3N3001/D
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