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NB3N2304NZMNR4G Datasheet

  • NB3N2304NZMNR4G

  • 3.3V 1:4 Clock Fanout Buffer

  • 7頁(yè)

  • ONSEMI

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NB3N2304NZ
3.3V 1:4 Clock Fanout
Buffer
Description
The NB3N2304NZ is a low skew 1鈭抰o 4 clock fanout buffer,
designed for high speed clock distribution such as in PCI鈭扻
applications. The NB3N2304NZ guarantees low output鈭抰o鈭抩utput
skew. Optimal design, layout and processing minimizes skew within a
device and from device鈭抰o鈭抎evice.
The Output Enable (OE) pin forces the outputs LOW when LOW.
Features
http://onsemi.com
MARKING
DIAGRAM*
40N
YWW
AG
TSSOP鈭?
DT SUFFIX
CASE 948S
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Input/Output Clock Frequency up to 140 MHz
Low Skew Outputs (100 ps)
Output Enable
Operating Range: V
DD
= 3.0 V to 3.6 V
Ideal for PCI鈭扻 and networking clocks
Packaged in 8鈭抪in TSSOP, 4.4 mm x 3 mm
Industrial Temperature Range
These are Pb鈭扚ree Devices*
1
DFN8
MN SUFFIX
CASE 506AA
A
Y
WW
G
1
XX M
4
= Assembly Location
= Year
= Work Week
= Pb鈭扚ree Package
*For additional marking information, refer to
Application Note AND8002/D.
*For additional information on our Pb鈭扚ree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Figure 1. Simplified Logic Diagram
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
漏
Semiconductor Components Industries, LLC, 2007
January, 2007
鈭?/div>
Rev. 1
1
Publication Order Number:
NB3N2304NZ/D

NB3N2304NZMNR4G 產(chǎn)品屬性

  • 1,000

  • 集成電路 (IC)

  • 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘緩沖器，驅(qū)動(dòng)器

  • -

  • 扇出緩沖器（分配）

  • 1

  • 1:4

  • 無(wú)/無(wú)

  • LVCMOS，LVTTL

  • LVCMOS，LVTTL

  • 140MHz

  • 3 V ~ 3.6 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 8-VFDFN 裸露焊盤(pán)

  • 8-DFN（2x2）

  • 帶卷 (TR)

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