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NB100LVEP56MNR2G Datasheet

  • NB100LVEP56MNR2G

  • 2.5V / 3.3V / 5VECL Dual Differential 2:1 Multiplexer

  • 152.31KB

  • 14頁(yè)

  • ONSEMI

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NB100LVEP56
2.5V / 3.3V / 5V ECL Dual
Differential 2:1 Multiplexer
The NB100LVEP56 is a dual, fully differential 2:1 multiplexer. The
differential data path makes the device ideal for multiplexing low
skew clock or differential data signals. The device features both
individual and common select inputs to address both data path and
random logic applications. Common and individual selects can accept
both ECL and CMOS input voltage levels. Multiple V
BB
pins are
provided.
The V
BB
pin, an internally generated voltage supply, is available to
this device only. For single鈭抏nded input operation, the unused
differential input is connected to V
BB
as a switching reference voltage.
V
BB
may also rebias AC coupled inputs. When used, decouple V
BB
and V
CC
via a 0.01
mF
capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, V
BB
should be left open.
http://onsemi.com
MARKING
DIAGRAMS*
20
1
20
N100
VP56
ALYW
1
24
1
24
1
TSSOP鈭?0
DT SUFFIX
CASE 948E
鈥?/div>
Maximum Input Clock Frequency > 2.5 GHz Typical
鈥?/div>
Maximum Input Data Rate > 2.5 Gb/s Typical
鈥?/div>
525 ps Typical Propagation Delays
鈥?/div>
Low Profile QFN Package
鈥?/div>
PECL Mode Operating Range:
鈥?/div>
NECL Mode Operating Range:
QFN鈭?4
MN SUFFIX
CASE 485L
A
L
Y
W
N100
VP56
ALYW
V
CC
= 2.375 V to 5.5 V with V
EE
= 0 V
V
CC
= 0 V with V
EE
=
鈭?.375
V to
鈭?.5
V
(Compatible with ECL and CMOS Input Voltage Levels)
鈥?/div>
Separate, Common Select, and Individual Select
= Assembly Location
= Wafer Lot
= Year
= Work Week
鈥?/div>
Q Output Will Default LOW with Inputs Open or at V
EE
鈥?/div>
Multiple V
BB
Outputs
鈥?/div>
Pb鈭扚ree Packages are Available*
*For additional information, see Application Note
AND8002/D
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
*For additional information on our Pb鈭扚ree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
錚?/div>
Semiconductor Components Industries, LLC, 2004
December, 2004
鈭?/div>
Rev. 5
1
Publication Order Number:
NB100LVEP56/D

NB100LVEP56MNR2G 產(chǎn)品屬性

  • 3,000

  • 集成電路 (IC)

  • 邏輯 - 信號(hào)開關(guān)，多路復(fù)用器，解碼器

  • 100LVEP

  • 差分?jǐn)?shù)字多路復(fù)用器

  • 2 x 2:1

  • 1

  • -

  • 雙電源

  • 2.38 V ~ 3.8 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 24-VFQFN 裸露焊盤

  • 24-QFN（4x4）

  • 帶卷 (TR)

  • NB100LVEP56MNR2GOS

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