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NB100ELT23L Datasheet

  • NB100ELT23L

  • 3.3V Dual Differential LVPECL/LVDS to LVTTL Translator

  • 6頁(yè)

  • ONSEMI

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NB100ELT23L
3.3V Dual Differential
LVPECL/LVDS to LVTTL
Translator
The NB100ELT23L is a dual differential LVPECL/LVDS to LVTTL
translator. Because LVPECL (Positive ECL) or LVDS levels are used,
only +3.3 V and ground are required. The small outline 8-lead package
and the dual gate design of the ELT23L makes it ideal for applications
which require the translation of a clock and a data signal.
The ELT23L is available in only the ECL 100K standard. Since
there are no LVPECL outputs or an external V
BB
reference, the
ELT23L does not require both ECL standard versions. The LVPECL
inputs are differential. Therefore, the NB100ELT23L can accept any
standard differential LVPECL/LVDS input referenced from a V
CC
of
+3.3 V.
http://onsemi.com
MARKING
DIAGRAMS*
8
SO鈭?
D SUFFIX
CASE 751
KT23L
ALYW
1
8
8
1
TSSOP鈭?
DT SUFFIX
CASE 948R
1
A
L
Y
W
= Assembly Location
= Wafer Lot
= Year
= Work Week
K23L
ALYW
8
1
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
2.1 ns Typical Propagation Delay
Maximum Operating Frequency > 160 MHz
24 mA LVTTL Outputs
Operating Range: V
CC
= 3.0 V to 3.6 V with GND = 0 V
Q Output Will Default LOW with Inputs Open or at GND
Pb鈭扚ree Packages are Available*
*For additional information, see Application Note
AND8002/D
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
*For additional information on our Pb鈭扚ree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
漏
Semiconductor Components Industries, LLC, 2005
1
February, 2005 鈭?Rev. 4
Publication Order Number:
NB100ELT23L/D

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