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MX27C2048 Datasheet

  • MX27C2048

  • 2M-BIT [256Kx8/128x16] CMOS EPROM

  • 18頁(yè)

  • MCNIX

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MX27C2100/27C2048
2M-BIT [256Kx8/128x16] CMOS EPROM
FEATURES
鈥?/div>
128K x 16 organization(MX27C2048, JEDEC pin
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
out)
256K x 8 or 128K x 16 organization(MX27C2100,
ROM pin out compatible)
+12.5V programming voltage
Fast access time: 55/70/90/120/150 ns
Totally static operation
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Completely TTL compatible
Operating current: 40mA
Standby current: 100uA
Package type:
- 40 pin plastic DIP
- 44 pin PLCC(MX27C2048)
- 40 pin TSOP(I)(MX27C2048)
GENERAL DESCRIPTION
The MX27C2100/2048 is a 5V only, 2M-bit, One Time
Programmable Read Only Memory. It is organized as
128K words by 16 bits per word(MX27C2048), 256K x 8
or 128K x 16(MX27C2100), operates from a single + 5
volt supply, has a static standby mode, and features fast
single address location programming. All programming
signals are TTL levels, requiring a single pulse. For
programming outside from the system, existing EPROM
programmers may be used. The MX27C2100/2048
supports a intelligent fast programming algorithm which
can result in programming times of less than one minute.
This EPROM is packaged in industry standard 40 pin
dual-in-line packages, 44 lead PLCC, and 40 lead
TSOP(I) packages.
PIN CONFIGURATIONS
PDIP(MX27C2048)
VPP
CE
Q15
Q14
Q13
Q12
Q11
Q10
Q9
Q8
GND
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
OE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
VCC
PGM
A16
A15
A14
A13
A12
A11
A10
A9
GND
A8
A7
A6
A5
A4
A3
A2
A1
A0
PLCC(MX27C2048)
PGM
VCC
VPP
Q13
Q14
Q15
A16
A15
A14
NC
CE
Q12
Q11
Q10
Q9
Q8
GND
NC
Q7
Q6
Q5
Q4
7
6
1 44
40
39
A13
A12
A11
A10
A9
MX27C2048
12
MX27C2048
34
GND
NC
A8
A7
A6
17
18
Q3
Q2
Q1
Q0
OE
23
NC
A0
A1
A2
A3
29
28
A4
A5
40-TSOP(I)10x14mm (MX27C2048)
A9
A10
A11
A12
A13
A14
A15
A16
PGM
VCC
VPP
CE
Q15
Q14
Q13
Q12
Q11
Q10
Q9
Q8
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
GND
A8
A7
A6
A5
A4
A3
A2
A1
A0
OE
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
GND
BLOCK DIAGRAM (MX27C2048)
CE
PGM
OE
CONTROL
LOGIC
OUTPUT
BUFFERS
Q0~Q15
.
.
.
.
.
.
.
.
Y-DECODER
MX27C2048
A0~A16
ADDRESS
INPUTS
X-DECODER
.
.
.
.
.
.
.
.
Y-SELECT
2M BIT
CELL
MAXTRIX
VCC
VSS
VPP
P/N: PM0158
REV. 4.3, AUG. 22, 2000
1

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