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MVTX2801AG Datasheet

  • MVTX2801AG

  • Unmanaged 4-Port 1000 Mbps Ethernet Switch

  • 106頁

  • ZARLINK   ZARLINK

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MVTX2801
Unmanaged 4-Port 1000 Mbps
Ethernet Switch
Data Sheet
Features
鈥?/div>
4 Gigabit Ports with GMII and PCS interface
-
鈥?/div>
Gigabit Port can also support 100/10 Mbps MII
interface
Ordering Information
MVTX2801AG
596-pin HSBGA
October 2003
High Performance Layer 2 Packet Forwarding
(11.904M packets per second) and Filtering at
Full-Wire Speed
Maximum throughput is 4 Gbps non-blocking
Centralized shared-memory architecture
Consists of two Memory Domains at 133 MHz
-
-
Frame Buffer Domain: one bank of ZBT-SRAM
with 1M/2MB total
Switch Database Domain with 256K/512K
SRAM.
鈥?/div>
鈥?/div>
-40擄C to +85擄C
Provides 2 level dropping precedence with WRED
mechanism
-
-
-
-
鈥?/div>
鈥?/div>
鈥?/div>
User controlled thresholds for WRED
VLAN Priority field in VLAN tagged frame.
DS/TOS field in IP packet
The precedence of above two classifications
can be programmable
Classification based on layer 2, 3 markings
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Up to 64K MAC addresses to provide large node
aggregation in wiring closet switches
QoS Support
Supports IEEE 802.1p/Q Quality of Service with 8
Priority
Buffer Management: reserve buffers on per class
and per port basis
Traffic Classification
鈥?/div>
鈥?/div>
Classify traffic into 8 transmission priorities per
port
Supports Delay bounded, Strict Priority, and WFQ
Frame Data Buffer A
ZBT-SRAM (1M/2MB)
SRAM 256/512K
SW Databasee
MAC Table
32bit
SDB Interface
LED
Search
Engine
NM
Database
VTX2800
64bit
FDB Interface
Frame
Engine
Scheduler
Management
Module
GMII
/PCS
Port 0
GMII
/PCS
Port 1
GMII
/PCS
Port 2
GMII
/PCS
Port 3
Serial /
I2C
Figure 1 - Chip Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2003, Zarlink Semiconductor Inc. All Rights Reserved.

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