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MUN52XXT1 Datasheet

  • MUN52XXT1

  • NPN SILICON BIAS RESISTOR TRANSISTORS

  • 10頁

  • ONSEMI

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MUN5211T1 Series
Preferred Devices
Bias Resistor Transistor
NPN Silicon Surface Mount Transistor
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The BRT (Bias Resistor
Transistor) contains a single transistor with a monolithic bias network
consisting of two resistors; a series base resistor and a base鈭抏mitter
resistor. The BRT eliminates these individual components by
integrating them into a single device. The use of a BRT can reduce
both system cost and board space. The device is housed in the
SC鈭?0/SOT鈭?23 package which is designed for low power
surface mount applications.
鈥?/div>
Simplifies Circuit Design
鈥?/div>
Reduces Board Space
鈥?/div>
Reduces Component Count
鈥?/div>
The SC鈭?0/SOT鈭?23 package can be soldered using wave or reflow.
The modified gull鈭抴inged leads absorb thermal stress during
soldering eliminating the possibility of damage to the die.
鈥?/div>
Available in 8 mm embossed tape and reel. Use the Device Number
to order the 7 inch/3000 unit reel.
鈥?/div>
Pb鈭扚ree Packages are Available
MAXIMUM RATINGS
(T
A
= 25擄C unless otherwise noted)
Rating
Collector鈭払ase Voltage
Collector鈭扙mitter Voltage
Collector Current
Symbol
V
CBO
V
CEO
I
C
Value
50
50
100
Unit
Vdc
Vdc
mAdc
SC鈭?0/SOT鈭?23
CASE 419
STYLE 3
8x M
http://onsemi.com
NPN SILICON
BIAS RESISTOR
TRANSISTORS
PIN 3
COLLECTOR
(OUTPUT)
PIN 2
EMITTER
(GROUND)
PIN 1
BASE
(INPUT)
R
1
R
2
MARKING DIAGRAM
THERMAL CHARACTERISTICS
Characteristic
Total Device Dissipation
T
A
= 25擄C
Derate above 25擄C
Thermal Resistance
鈭?/div>
Junction鈭抰o鈭扐mbient
Thermal Resistance
鈭?/div>
Junction鈭抰o鈭扡ead
Junction and Storage
Temperature Range
Symbol
P
D
Max
202 (Note 1)
310 (Note 2)
1.6 (Note 1)
2.5 (Note 2)
618 (Note 1)
403 (Note 2)
280 (Note 1)
332 (Note 2)
鈭?5
to +150
Unit
mW
mW/擄C
擄C/W
8x
x
M
= Specific Device Code
= (See Marking Table)
= Date Code
R
qJA
R
qJL
T
J
, T
stg
ORDERING INFORMATION
擄C/W
擄C
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. FR鈭? @ Minimum Pad.
2. FR鈭? @ 1.0 x 1.0 inch Pad.
DEVICE MARKING INFORMATION
See specific marking information in the device marking table
on page 2 of this data sheet.
Preferred
devices are recommended choices for future use
and best overall value.
錚?/div>
Semiconductor Components Industries, LLC, 2004
November, 2004
鈭?/div>
Rev. 6
1
Publication Order Number:
MUN5211T1/D

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    Dual Bias Resistor Transistors
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