鈩?/div>
CL2151 is a universal cable transceiver solution for advanced
set-top boxes (STB) and cable modems compliant with DVB/DAVIC, and DOCSIS
standards. The CL2151 is built for STB and cable-modem manufacturers requiring the
maximum performance with the lowest system BOM cost. Its high level of integration
provides manufacturers with a flexible, yet quick time-to-market solution for standards-
based deployments all over the world.
The CL2151 is a complete and highly integrated solution combining a
16-256 QAM in-band receiver, QPSK/QAM receiver for out-of-band downstream
reception, a QPSK/16-QAM burst transmitter, and a proven DAVIC/DVB and DOCSIS
1.0/1.1 media access controller (MAC). The chip includes a RISC processor with a DSP
instruction set enabling glueless interface to subscriber line ICs (SLICs) and a POD
interface.
The CL2151 inband demodulator is a 16-256 QAM. A second out-of-band
downstream channel provides an option to use a QPSK or full 16-256 QAM demodu-
lation, allowing for flexible implementation for DOCSIS, DVB/DAVIC or DVS 178
without changing any external components. Both channels are compliant with ITU J.83
Annex A, B, and C and integrate a 10-bit A/D converter. The upstream QPSK/16-QAM
burst transmitter along with ITU J.112 Annex A, B compliant FEC encoding provides a
robust and cost-effective solution for DVB/DAVIC, and DOCSIS applications.
The hardware MAC (with packet parsing, filtering, and decryption), and the
two internal processors 鈥?an 88 MHz mini-RISC and 117 MHz SPARC v8 processor,
upon which the standard specific MAC software is executed 鈥?allow for flexible
implementation of DVB In-Band, DOCSIS, or EuroDOCSIS standards.
鈥?OpenCable
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compliant by supporting
OOB data to be bypassed to a POD
interface for MAC processing
鈥?PHY DES implementation for physical
security compliant to the OpenCable
and DVB standards
鈥?Powerful SPARC v8 internal processor
offloads the STB host processor from
the MAC software tasks and provides
a DSP capability for IP telephony
Optional POD Module
INTERFACE FEATURES:
applications
TS
Switch
DOCSIS
Pre-Process
TS Demux
Bus
Interface
Unit
STB Host
(POD CPU
Interface)
Annex B FEC
In-Band
Tuner
ADC
QAM
Demod
Annex A FEC
Annex B FEC
Diplexer
OOB
Tuner
ADC
QAM/
QPSK
Demod
Annex A FEC
DVS 178 FEC
DAVIC
OOB FEC
鈥?Internal processor includes a DSP
instruction set necessary for IP
telephony applications
鈥?Delivers a video telephony solution
CPU
&
DSP
Downstream
MAC
Processor
DES Dec
DAVIC
DVB-RC
MAC/SAR
Upstream
DOCSIS MAC
CL2151
DAVIC
OOB
Framer
DES Enc
VGA
QAM16/
QPSK
Mod
Amp Control
Copy/CRC
Engine
simply by adding uLAW or aLAW
audio codec, aSLIC chipset and an
MPEG video source encoder/decoder
FEC Encode
SDRAM
Control
SLIC I/F
SPI
IDC
UART
GPIO
SDRAM
High-Level Block Diagram of MultiLynx鈩?CL2151
The
Communications
Company
TM
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