音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

MT9040AN Datasheet

  • MT9040AN

  • T1/E1 Synchronizer

  • 27頁

  • ZARLINK   ZARLINK

掃碼查看芯片數(shù)據(jù)手冊

上傳產(chǎn)品規(guī)格書

PDF預(yù)覽

MT9040
T1/E1 Synchronizer
Data Sheet
Features
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Supports AT&T TR62411 and Bellcore GR-1244-
CORE and Stratum 4 timing for DS1 interfaces
Supports ETSI ETS 300 011, TBR 4, TBR 12 and
TBR 13 timing for E1 interfaces
Selectable 19.44 MHz, 1.544MHz, 2.048MHz or
8kHz input reference signals
Provides C1.5, C2, C4, C6, C8, C16, and C19
(STS-3/OC3 clock divided by 8) output clock
signals
Provides 5 different styles of 8 KHz framing
pulses
Attenuates wander from 1.9Hz
Fast lock mode
JTAG Boundary Scan
The MT9040 generates ST-BUS clock and framing
signals that are phase locked to either a 19.44 MHz,
2.048MHz, 1.544MHz, or 8kHz input reference.
The MT9040 is compliant with AT&T TR62411 and
Bellcore GR-1244-CORE, Stratum 4; and ETSI ETS
300 011. It will meet the jitter/wander tolerance, jitter
transfer, intrinsic jitter, frequency accuracy and capture
range for these specifications.
Ordering Information
MT9040AN 48 pin SSOP
-40擄C to +85擄C
November 2003
Description
The MT9040 T1/E1 System Synchronizer contains a
digital phase-locked loop (DPLL), which provides timing
and synchronization signals for T1 and E1 primary rate
transmission links.
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Applications
鈥?/div>
鈥?/div>
Synchronization and timing control for multitrunk
T1 and E1 systems
ST-BUS clock and frame pulse source
OSCi
OSCo
FLOCK
LOCK
VDD
VSS
Master Clock
TCK
TDI
TMS
TRST
TDO
IEEE
1149.1a
DPLL
Output
Interface
Circuit
Input
Impairment
Monitor
REF
C19o
C1.5o
C2o
C4o
C6o
C8o
C16o
F0o
F8o
F16o
RSP
TSP
Control State Machine
Feedback
Frequency
Select
MUX
MS
RST
IM
FS1
FS2
Figure 1 - Functional Block Diagram
Zarlink Semiconductor US Patent No. 5,602,884, UK Patent No. 0772912,
France Brevete S.G.D.G. 0772912; Germany DBP No. 69502724.7-08
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2003, Zarlink Semiconductor Inc. All Rights Reserved.

MT9040AN相關(guān)型號PDF文件下載

  • 型號
    版本
    描述
    廠商
    下載
  • 英文版
    T1/E1 Synchronizer
    ZARLINK
  • 英文版
    T1/E1 Synchronizer
    ZARLINK [Z...
  • 英文版
    Multiple Output Trunk PLL
    MITEL
  • 英文版
    Multiple Output Trunk PLL
    MITEL [Mit...
  • 英文版
    Global Digital Trunk Synchronizer
    MITEL
  • 英文版
    Global Digital Trunk Synchronizer
    MITEL [Mit...
  • 英文版
    T1/E1 System Synchronizer
    ZARLINK
  • 英文版
    T1/E1 System Synchronizer
    ZARLINK [Z...
  • 英文版
    T1/E1/OC3 System Synchronizer
    MITEL
  • 英文版
    T1/E1/OC3 System Synchronizer
    MITEL [Mit...
  • 英文版
    T1/E1/OC3 System Synchronizer
    ZARLINK
  • 英文版
    T1/E1/OC3 System Synchronizer
    ZARLINK [Z...
  • 英文版
    T1/E1 System Synchronizer with Holdover
    ZARLINK
  • 英文版
    T1/E1 System Synchronizer with Holdover
    ZARLINK [Z...
  • 英文版
    Octal T1/E1/J1 Framer
    ZARLINK
  • 英文版
    Octal T1/E1/J1 Framer
    ZARLINK [Z...
  • 英文版
    T1/E1/J1 Single Chip Transceiver
    MITEL
  • 英文版
    T1/E1/J1 Single Chip Transceiver
    MITEL [Mit...
  • 英文版
    E1 Single Chip Transceiver
    MITEL
  • 英文版
    E1 Single Chip Transceiver
    MITEL [Mit...

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務(wù)：
賣家服務(wù)：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時間周一至周五
9:00-17:30

關(guān)注官方微信號，
第一時間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務(wù)的動力！意見一經(jīng)采納，將有感恩紅包奉上哦！