廬
MSS40 / 50 Series
BACK TO BACK SCR MODULE
MAIN FEATURES:
Symbol
I
T(RMS)
V
DRM
/V
RRM
I
GT
Value
55 and 70
800 and 1200
50
Unit
A
V
mA
G2
A2
G1
DESCRIPTION
Packaged in ISOTOP modules, the MSS40 /
MSS50 Series is based on two back-to-back SCR
configurations, providing high noise immunity.
They are suitable for high power applications such
as solid state relays, heating control systems,
welding equipment, motor control circuits...
The compactness of the ISOTOP package allows
high power density and optimized power bus
connections. Thanks to their internal ceramic pad,
they provide high voltage insulation (2500V RMS),
complying with UL standards (File ref: E81734).
PIN CONNECTIONS
A1
ISOTOP廬
G1
1: Thyristor 2 Anode (A2)
2: Thyristor 2 Gate (G2)
3: Thyristor 1 Anode (A1)
4: Thyristor 1 Gate (G1)
4
1
3
A1
A2
2
G2
ABSOLUTE RATINGS
(limiting values)
Symbol
Parameter
MSS40
I
T(RMS)
I
TSM
I
虜
t
dI/dt
I
GM
P
G(AV)
T
stg
T
j
V
RGM
RMS on-state current
Non repetitive surge peak on-state
current
I
虜
t Value for fusing
Critical rate of rise of on-state current
I
G
= 2 x I
GT
, tr
鈮?/div>
100 ns
Peak gate current
Average gate power dissipation
Storage junction temperature range
Operating junction temperature range
Maximum peak reverse gate voltage
Tc = 80 擄C
Tc = 85 擄C
tp = 16.7 ms
Tj = 25擄C
tp = 20 ms
tp = 10 ms
F = 120 Hz
tp = 20 碌s
Tj = 25擄C
Tj = 125擄C
Tj = 125擄C
Tj = 125擄C
55
420
400
800
50
4
1
- 40 to + 150
- 40 to + 125
5
70
630
600
1800
Value
MSS50
A
A
A
2
S
A/碌s
A
W
擄C
V
1/5
Unit
ISOTOP is a registred trademark of STMicroelectronics
September 2000 - Ed: 3
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