E2L0046-17-Y1
隆 Semiconductor
隆 Semiconductor
MSM54V32126/8
DESCRIPTION
This version: Jan. 1998
MSM54V32126/8
Previous version: Dec. 1996
e
Pr
lim
y
ar
in
131,072-Word
樓
32-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO
The MSM54V32126/8 is a new generation Graphics DRAM organized in a 131,072-word
樓
32-bit
configuration. The technology used to fabricate the MSM54V32126/8 is OKI's CMOS silicon gate
process technology. The device operates with a single 3.3 V power supply.
FEATURES
鈥?131,072-word
樓
32-bit organization
鈥?Single 3.3 V power supply,
鹵0.3
V tolerance
鈥?Refresh: 512 cycles/8 ms
鈥?Fast Page Mode with Extended Data Out (EDO)
鈥?Write per bit (MSM54V32128 only)
鈥?Byte write, Byte read
鈥?/div>
RAS
only refresh
鈥?/div>
CAS
before
RAS
refresh
鈥?/div>
CAS
before
RAS
self-refresh
鈥?Hidden refresh
鈥?Package:
64-pin 525 mil plastic SSOP (SSOP64-P-525-0.80-K)
(Product : MSM54V32126-xxGS-K)
(Product : MSM54V32128-xxGS-K)
xx indicates speed rank.
PRODUCT FAMILY
Family
MSM54V32126/8-50
MSM54V32126/8-60
Access Time (Max.)
t
RAC
t
AA
t
CAC
t
OEA
50 ns 25 ns 15 ns 15 ns
60 ns 30 ns 18 ns 18 ns
Cycle Time
(Min.)
110 ns
130 ns
Power Dissipation
Operating (Max.) Standby (Max.)
504 mW
486 mW
3.1 mW
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